linux-kernel - Re: [PATCH v6 2/4] x86/mce: Add per-bank CMCI storm mitigation

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Date:   Fri, 23 Jun 2023 14:09:04 +0200
From:   Borislav Petkov <bp@...en8.de>
To:     Tony Luck <tony.luck@...el.com>
Cc:     Yazen Ghannam <yazen.ghannam@....com>,
        Smita.KoralahalliChannabasappa@....com,
        dave.hansen@...ux.intel.com, x86@...nel.org,
        linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
        patches@...ts.linux.dev
Subject: Re: [PATCH v6 2/4] x86/mce: Add per-bank CMCI storm mitigation

On Fri, Jun 16, 2023 at 11:27:42AM -0700, Tony Luck wrote:
> -void mce_timer_kick(unsigned long interval);
> +void mce_timer_kick(bool storm);
> +void mce_handle_storm(int bank, bool on);
> +void cmci_storm_begin(int bank);
> +void cmci_storm_end(int bank);
> +
> +/**

Yeah, let's not add kernel-doc comments about structs in internal.h
which are no one's business outside of MCA.

> + * struct mca_storm_desc - CMCI storm tracking data
> + * @stormy_bank_count: count of MC banks in storm state
> + * @bank_history: bitmask tracking of corrected errors seen in each bank
> + * @bank_storm: determines whether the bank is in storm mode
> + * @bank_time_stamp: last time (in jiffies) that each bank was polled
> + */
> +struct mca_storm_desc {
> +	int		stormy_bank_count;
> +	u64		bank_history[MAX_NR_BANKS];
> +	bool		bank_storm[MAX_NR_BANKS];
> +	unsigned long	bank_time_stamp[MAX_NR_BANKS];
> +};
> +DECLARE_PER_CPU(struct mca_storm_desc, storm_desc);

Would that make the members organization even better:

struct storm_bank {
	u64 history;
	u64 timestamp;
	bool storm;
};

struct mca_storm_desc {
	struct storm_bank banks[MAX_NR_BANKS];
	unsigned int	  bank_count;
};

?

>From the previous mail:

> storm_poll_mode is a regular per-cpu variable that indicates a CPU is in
> poll mode because one or more of the banks it owns has gone over the
> storm threshold.

It is still a per-CPU var which can be part of the storm descriptor, no?

> bank_storm - is a per-cpu per-bank indicator that a particular bank
> on a particular CPU is in storm mode.

Ok, so the above can be extended to:

struct mca_storm_desc {
        struct storm_bank banks[MAX_NR_BANKS];
        unsigned int      bank_count;
	bool		  poll_mode;
};

?

> +/*
> + * How many polls of machine check bank without an error before declaring
> + * the storm is over
> + */
> +#define STORM_END_POLL_THRESHOLD	30

So what's stopping you from doing

/*
 * How many polls of machine check bank without an error before declaring
 * the storm is over. Since it is tracked in the struct
 * storm_bank.history member as a bitmask, the mask is 30 bits [0 ... 29]
 */
#define STORM_END_POLL_THRESHOLD	29

?

And you've also explained it in text too so that it is perfectly clear
what the intent is.

>  #ifdef CONFIG_ACPI_APEI
>  int apei_write_mce(struct mce *m);
> diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
> index e7936be84204..cd9d9ea5bb0a 100644
> --- a/arch/x86/kernel/cpu/mce/core.c
> +++ b/arch/x86/kernel/cpu/mce/core.c
> @@ -607,6 +607,83 @@ static struct notifier_block mce_default_nb = {
>  	.priority	= MCE_PRIO_LOWEST,
>  };
>  
> +DEFINE_PER_CPU(struct mca_storm_desc, storm_desc);
> +
> +void cmci_storm_begin(int bank)
> +{
> +	struct mca_storm_desc *storm = this_cpu_ptr(&storm_desc);
> +
> +	__set_bit(bank, this_cpu_ptr(mce_poll_banks));
> +	storm->bank_storm[bank] = true;
> +
> +	/*
> +	 * If this is the first bank on this CPU to enter storm mode
> +	 * start polling
> +	 */
> +	if (++storm->stormy_bank_count == 1)

	if (++storm->stormy_bank_count)

> +		mce_timer_kick(true);
> +}
> +
> +void cmci_storm_end(int bank)
> +{
> +	struct mca_storm_desc *storm = this_cpu_ptr(&storm_desc);
> +
> +	__clear_bit(bank, this_cpu_ptr(mce_poll_banks));
> +	storm->bank_history[bank] = 0ull;
> +	storm->bank_storm[bank] = false;
> +
> +	/* If no banks left in storm mode, stop polling */
> +	if (!this_cpu_dec_return(storm_desc.stormy_bank_count))
> +		mce_timer_kick(false);
> +}
> +
> +void track_cmci_storm(int bank, u64 status)

This is still not called cmci_track_storm() ;-\

And looking at the AMD side of things, there's a track_cmci_storm() in
amd_threshold_interrupt() which doesn't make any sense whatsoever.

Or at least this was my initial reaction because why would the AMD side
call a "CMCI" specific function. So they're prefixed with "cmci_" but
they don't really have anything to do with the Intel CMCI feature - it
is a storm handling code.

Which means, since those are used by both, the confusing "cmci" should
not be in the names.

And which also means, those should be static and private to mce/core.c.
But I'll see what functionality the rest of the patches need and how it
all should be split/exported properly.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette