linux-kernel - Re: [PATCH v6 19/27] cxl/port: Remove Component Register base address from struct cxl

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Message-ID: <94ad8187-e4a3-fb9c-d043-ff1e2130b0ed@intel.com>
Date:   Thu, 22 Jun 2023 17:04:24 -0700
From:   Dave Jiang <dave.jiang@...el.com>
To:     Terry Bowman <terry.bowman@....com>, <alison.schofield@...el.com>,
        <vishal.l.verma@...el.com>, <ira.weiny@...el.com>,
        <bwidawsk@...nel.org>, <dan.j.williams@...el.com>,
        <Jonathan.Cameron@...wei.com>, <linux-cxl@...r.kernel.org>
CC:     <rrichter@....com>, <linux-kernel@...r.kernel.org>,
        <bhelgaas@...gle.com>
Subject: Re: [PATCH v6 19/27] cxl/port: Remove Component Register base address
 from struct cxl_port



On 6/21/23 20:51, Terry Bowman wrote:
> From: Robert Richter <rrichter@....com>
> 
> The Component Register base address @component_reg_phys is no longer
> used after the rework of the Component Register setup which now uses
> struct member @comp_map instead. Remove the base address.
> 
> Signed-off-by: Robert Richter <rrichter@....com>
> Signed-off-by: Terry Bowman <terry.bowman@....com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@...wei.com>

Reviewed-by: Dave Jiang <dave.jiang@...el.com>

> ---
>   drivers/cxl/core/port.c | 4 +---
>   drivers/cxl/cxl.h       | 2 --
>   2 files changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> index 45fe7d89f7f3..cfae8307de90 100644
> --- a/drivers/cxl/core/port.c
> +++ b/drivers/cxl/core/port.c
> @@ -616,7 +616,6 @@ static int devm_cxl_link_parent_dport(struct device *host,
>   static struct lock_class_key cxl_port_key;
>   
>   static struct cxl_port *cxl_port_alloc(struct device *uport_dev,
> -				       resource_size_t component_reg_phys,
>   				       struct cxl_dport *parent_dport)
>   {
>   	struct cxl_port *port;
> @@ -667,7 +666,6 @@ static struct cxl_port *cxl_port_alloc(struct device *uport_dev,
>   	} else
>   		dev->parent = uport_dev;
>   
> -	port->component_reg_phys = component_reg_phys;
>   	ida_init(&port->decoder_ida);
>   	port->hdm_end = -1;
>   	port->commit_end = -1;
> @@ -726,7 +724,7 @@ static struct cxl_port *__devm_cxl_add_port(struct device *host,
>   	struct device *dev;
>   	int rc;
>   
> -	port = cxl_port_alloc(uport_dev, component_reg_phys, parent_dport);
> +	port = cxl_port_alloc(uport_dev, parent_dport);
>   	if (IS_ERR(port))
>   		return port;
>   
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index b1adca9b27ba..9f46a4e1fbec 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -551,7 +551,6 @@ struct cxl_dax_region {
>    * @nr_dports: number of entries in @dports
>    * @hdm_end: track last allocated HDM decoder instance for allocation ordering
>    * @commit_end: cursor to track highest committed decoder for commit ordering
> - * @component_reg_phys: component register capability base address (optional)
>    * @dead: last ep has been removed, force port re-creation
>    * @depth: How deep this port is relative to the root. depth 0 is the root.
>    * @cdat: Cached CDAT data
> @@ -571,7 +570,6 @@ struct cxl_port {
>   	int nr_dports;
>   	int hdm_end;
>   	int commit_end;
> -	resource_size_t component_reg_phys;
>   	bool dead;
>   	unsigned int depth;
>   	struct cxl_cdat {