| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20230623022334.791026-7-gnstark@sberdevices.ru>
Date: Fri, 23 Jun 2023 05:20:14 +0300
From: George Stark <gnstark@...rdevices.ru>
To: <jic23@...nel.org>, <lars@...afoo.de>, <neil.armstrong@...aro.org>,
<khilman@...libre.com>, <jbrunet@...libre.com>,
<martin.blumenstingl@...glemail.com>,
<andriy.shevchenko@...ux.intel.com>, <nuno.sa@...log.com>,
<gnstark@...rdevices.ru>
CC: <linux-iio@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
<linux-amlogic@...ts.infradead.org>, <kernel@...rdevices.ru>,
George Stark <GNStark@...rdevices.ru>
Subject: [PATCH v2 6/6] meson saradc: support reading from channel7 mux inputs
Add iio channel for every channel 7 muxer input.
Meson saradc channel 7 is connected to muxer that can switch channel
input to well-known sources like Vdd, GND and several Vdd dividers.
Signed-off-by: George Stark <GNStark@...rdevices.ru>
---
Changelog:
v1->v2: update commit message from [1]
[1] https://lore.kernel.org/lkml/20230621062715.455652-4-gnstark@sberdevices.ru/
---
drivers/iio/adc/meson_saradc.c | 65 +++++++++++++++++++++++++++++++---
1 file changed, 61 insertions(+), 4 deletions(-)
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
index e7eb154b151f..ecaebb569e8e 100644
--- a/drivers/iio/adc/meson_saradc.c
+++ b/drivers/iio/adc/meson_saradc.c
@@ -163,6 +163,7 @@
#define MESON_SAR_ADC_MAX_FIFO_SIZE 32
#define MESON_SAR_ADC_TIMEOUT 100 /* ms */
#define MESON_SAR_ADC_VOLTAGE_AND_TEMP_CHANNEL 6
+#define MESON_SAR_ADC_VOLTAGE_AND_MUX_CHANNEL 7
#define MESON_SAR_ADC_TEMP_OFFSET 27
/* temperature sensor calibration information in eFuse */
@@ -201,6 +202,19 @@
.datasheet_name = "TEMP_SENSOR", \
}
+#define MESON_SAR_ADC_MUX(_chan, _sel) { \
+ .type = IIO_VOLTAGE, \
+ .channel = _chan, \
+ .indexed = 1, \
+ .address = MESON_SAR_ADC_VOLTAGE_AND_MUX_CHANNEL, \
+ .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
+ BIT(IIO_CHAN_INFO_AVERAGE_RAW), \
+ .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
+ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_CALIBBIAS) | \
+ BIT(IIO_CHAN_INFO_CALIBSCALE), \
+ .datasheet_name = "SAR_ADC_MUX_"#_sel, \
+}
+
enum meson_sar_adc_avg_mode {
NO_AVERAGING = 0x0,
MEAN_AVERAGING = 0x1,
@@ -233,6 +247,27 @@ enum meson_sar_adc_channel_index {
INDEX_CHAN_6,
INDEX_CHAN_7,
INDEX_CHAN_SOFT_TIMESTAMP,
+ INDEX_MUX_0_VSS,
+ INDEX_MUX_1_VDD_DIV4,
+ INDEX_MUX_2_VDD_DIV2,
+ INDEX_MUX_3_VDD_MUL3_DIV4,
+ INDEX_MUX_4_VDD,
+};
+
+static enum meson_sar_adc_chan7_mux_sel chan7_mux_values[] = {
+ CHAN7_MUX_VSS,
+ CHAN7_MUX_VDD_DIV4,
+ CHAN7_MUX_VDD_DIV2,
+ CHAN7_MUX_VDD_MUL3_DIV4,
+ CHAN7_MUX_VDD,
+};
+
+static const char * const chan7_mux_names[] = {
+ "gnd",
+ "0.25vdd",
+ "0.5vdd",
+ "0.75vdd",
+ "vdd",
};
static const struct iio_chan_spec meson_sar_adc_iio_channels[] = {
@@ -245,6 +280,11 @@ static const struct iio_chan_spec meson_sar_adc_iio_channels[] = {
MESON_SAR_ADC_CHAN(INDEX_CHAN_6),
MESON_SAR_ADC_CHAN(INDEX_CHAN_7),
IIO_CHAN_SOFT_TIMESTAMP(INDEX_CHAN_SOFT_TIMESTAMP),
+ MESON_SAR_ADC_MUX(INDEX_MUX_0_VSS, 0),
+ MESON_SAR_ADC_MUX(INDEX_MUX_1_VDD_DIV4, 1),
+ MESON_SAR_ADC_MUX(INDEX_MUX_2_VDD_DIV2, 2),
+ MESON_SAR_ADC_MUX(INDEX_MUX_3_VDD_MUL3_DIV4, 3),
+ MESON_SAR_ADC_MUX(INDEX_MUX_4_VDD, 4),
MESON_SAR_ADC_TEMP_CHAN(), /* must be the last item */
};
@@ -284,6 +324,7 @@ struct meson_sar_adc_priv {
bool temperature_sensor_calibrated;
u8 temperature_sensor_coefficient;
u16 temperature_sensor_adc_val;
+ enum meson_sar_adc_chan7_mux_sel chan7_mux_sel;
};
static const struct regmap_config meson_sar_adc_regmap_config_gxbb = {
@@ -348,6 +389,8 @@ static void meson_sar_adc_set_chan7_mux(struct iio_dev *indio_dev,
MESON_SAR_ADC_REG3_CTRL_CHAN7_MUX_SEL_MASK, regval);
usleep_range(10, 20);
+
+ priv->chan7_mux_sel = sel;
}
static int meson_sar_adc_read_raw_sample(struct iio_dev *indio_dev,
@@ -443,6 +486,15 @@ static void meson_sar_adc_enable_channel(struct iio_dev *indio_dev,
regmap_update_bits(priv->regmap,
MESON_SAR_ADC_DELTA_10,
MESON_SAR_ADC_DELTA_10_TEMP_SEL, regval);
+ } else if (chan->address == MESON_SAR_ADC_VOLTAGE_AND_MUX_CHANNEL) {
+ enum meson_sar_adc_chan7_mux_sel sel;
+
+ if (chan->channel == INDEX_CHAN_7)
+ sel = CHAN7_MUX_CH7_INPUT;
+ else
+ sel = chan7_mux_values[chan->channel - INDEX_MUX_0_VSS];
+ if (sel != priv->chan7_mux_sel)
+ meson_sar_adc_set_chan7_mux(indio_dev, sel);
}
}
@@ -1015,7 +1067,7 @@ static int meson_sar_adc_calib(struct iio_dev *indio_dev)
meson_sar_adc_set_chan7_mux(indio_dev, CHAN7_MUX_VDD_DIV4);
usleep_range(10, 20);
ret = meson_sar_adc_get_sample(indio_dev,
- &indio_dev->channels[INDEX_CHAN_7],
+ &indio_dev->channels[INDEX_MUX_1_VDD_DIV4],
MEAN_AVERAGING, EIGHT_SAMPLES, &value0);
if (ret < 0)
goto out;
@@ -1023,7 +1075,7 @@ static int meson_sar_adc_calib(struct iio_dev *indio_dev)
meson_sar_adc_set_chan7_mux(indio_dev, CHAN7_MUX_VDD_MUL3_DIV4);
usleep_range(10, 20);
ret = meson_sar_adc_get_sample(indio_dev,
- &indio_dev->channels[INDEX_CHAN_7],
+ &indio_dev->channels[INDEX_MUX_3_VDD_MUL3_DIV4],
MEAN_AVERAGING, EIGHT_SAMPLES, &value1);
if (ret < 0)
goto out;
@@ -1050,8 +1102,13 @@ static int read_label(struct iio_dev *indio_dev,
{
if (chan->type == IIO_TEMP)
return sprintf(label, "%s\n", "temp-sensor");
- if (chan->type == IIO_VOLTAGE)
- return sprintf(label, "channel-%d\n", chan->channel);
+ if (chan->type == IIO_VOLTAGE) {
+ if (chan->channel <= INDEX_CHAN_7)
+ return sprintf(label, "channel-%d\n", chan->channel);
+ if (chan->channel >= INDEX_MUX_0_VSS)
+ return sprintf(label, "%s\n",
+ chan7_mux_names[chan->channel - INDEX_MUX_0_VSS]);
+ }
return 0;
}
--
2.38.4
Powered by blists - more mailing lists