lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 23 Jun 2023 12:14:00 -0400
From:   Yazen Ghannam <yazen.ghannam@....com>
To:     Borislav Petkov <bp@...en8.de>, "Luck, Tony" <tony.luck@...el.com>
Cc:     yazen.ghannam@....com,
        "linux-edac@...r.kernel.org" <linux-edac@...r.kernel.org>,
        "Raj, Ashok" <ashok.raj@...el.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "x86@...nel.org" <x86@...nel.org>
Subject: Re: [PATCH 1/2] x86/mce: Disable preemption for CPER decoding

On 6/23/2023 12:01 PM, Borislav Petkov wrote:
> On Fri, Jun 23, 2023 at 03:44:06PM +0000, Luck, Tony wrote:
>> There is (or was) support for mixed stepping in the microcode update
>> code. Not sure if Boris and Ashok came to any agreement on keeping it.
> 
> Yap, needs to stay on AMD as the loader has always supported it.
> 

I don't understand this. Maybe it's a wording thing. I see the following 
in a PPR document.

Section: Mixed Processor Revision Supports

AMD Family XXh Models XXh processors with different OPNs or different 
revisions cannot be mixed in a multiprocessor system. If the BIOS 
detects an unsupported configuration, the system will halt prior to X86 
core release and signal a port 80 error code.

Is stepping not included in this statement?

Or do you mean that we can support mixed microcode systems? Meaning the 
processors are identical but with different microcode versions.

Thanks,
Yazen

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ