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Message-Id: <20230625094857.29644-3-sherry.sun@nxp.com>
Date: Sun, 25 Jun 2023 17:48:55 +0800
From: Sherry Sun <sherry.sun@....com>
To: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
conor+dt@...nel.org, shawnguo@...nel.org, s.hauer@...gutronix.de,
festevam@...il.com, shenwei.wang@....com,
gregkh@...uxfoundation.org
Cc: devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
kernel@...gutronix.de, linux-serial@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-imx@....com
Subject: [PATCH 2/4] arm64: dts: imx8ulp: remove "fsl,imx7ulp-lpuart" compatible for i.MX8ULP
i.MX8ULP has specific "fsl,imx8ulp-lpuart" compatible in lpuart driver,
"fsl,imx7ulp-lpuart" compatible is no longer needed, and i.MX8ULP is not
fully compatible with i.MX7ULP, for example, i.MX8ulp can support
EOP(end-of-packet) function while i.MX7ulp doesn't, so remove
"fsl,imx7ulp-lpuart" compatible.
Signed-off-by: Sherry Sun <sherry.sun@....com>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 57627bdaa851..e900f5b25694 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -245,7 +245,7 @@
};
lpuart4: serial@...90000 {
- compatible = "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
+ compatible = "fsl,imx8ulp-lpuart";
reg = <0x29390000 0x1000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc3 IMX8ULP_CLK_LPUART4>;
@@ -254,7 +254,7 @@
};
lpuart5: serial@...a0000 {
- compatible = "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
+ compatible = "fsl,imx8ulp-lpuart";
reg = <0x293a0000 0x1000>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc3 IMX8ULP_CLK_LPUART5>;
@@ -334,7 +334,7 @@
};
lpuart6: serial@...60000 {
- compatible = "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
+ compatible = "fsl,imx8ulp-lpuart";
reg = <0x29860000 0x1000>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc4 IMX8ULP_CLK_LPUART6>;
@@ -343,7 +343,7 @@
};
lpuart7: serial@...70000 {
- compatible = "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart";
+ compatible = "fsl,imx8ulp-lpuart";
reg = <0x29870000 0x1000>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pcc4 IMX8ULP_CLK_LPUART7>;
--
2.17.1
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