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Message-Id: <168773507352.1389.2672044920046049803.b4-ty@rivosinc.com>
Date:   Sun, 25 Jun 2023 16:17:53 -0700
From:   Palmer Dabbelt <palmer@...osinc.com>
To:     Viacheslav Mitrofanov <v.v.mitrofanov@...ro.com>
Cc:     linux@...ro.com, Andrew Jones <ajones@...tanamicro.com>,
        Atish Patra <atishp@...osinc.com>,
        Atish Patra <atishp@...shpatra.org>,
        Anup Patel <anup@...infault.org>,
        Will Deacon <will@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/1] perf: RISC-V: Limit the number of counters
 returned from SBI


On Fri, 05 May 2023 07:20:57 +0000, Viacheslav Mitrofanov wrote:
> Perf gets the number of supported counters from SBI. If it happens that
> the number of returned counters more than RISCV_MAX_COUNTERS the code
> trusts it. It does not lead to an immediate problem but can potentially
> lead to it. Prevent getting more than RISCV_MAX_COUNTERS from SBI.
> 
> 

Applied, thanks!

[1/1] perf: RISC-V: Limit the number of counters returned from SBI
      https://git.kernel.org/palmer/c/ee95b88d71b9

Best regards,
-- 
Palmer Dabbelt <palmer@...osinc.com>

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