[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <87sfaem76q.fsf@all.your.base.are.belong.to.us>
Date: Mon, 26 Jun 2023 20:04:13 +0200
From: Björn Töpel <bjorn@...nel.org>
To: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
linux-riscv@...ts.infradead.org
Cc: Björn Töpel <bjorn@...osinc.com>,
linux-kernel@...r.kernel.org, linux@...osinc.com,
Palmer Dabbelt <palmer@...osinc.com>,
Rémi Denis-Courmont
<remi@...lab.net>, Darius Rad <darius@...espec.com>,
Andy Chiu <andy.chiu@...ive.com>
Subject: Re: [PATCH v2] riscv: Discard vector state on syscalls
Björn Töpel <bjorn@...nel.org> writes:
> Björn Töpel <bjorn@...nel.org> writes:
>
>> From: Björn Töpel <bjorn@...osinc.com>
>>
>> The RISC-V vector specification states:
>> Executing a system call causes all caller-saved vector registers
>> (v0-v31, vl, vtype) and vstart to become unspecified.
>
> A bit of a corner case, but this will make sigreturn syscalls discard
> the vector state as well.
>
> Is that an issue? E.g. a user cannot build userspace context switching
> application. Does arm64 SVE handle sigreturn in a special way?
NVM; My bad. The vector state is cleared on *entry*, but then the
registers passed on signal stack is restored as usual.
Sorry for the noise! We're all good!
Björn
Powered by blists - more mailing lists