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Message-ID: <20230626-9ed40a55c71d2fe50ed3b8da@orel>
Date: Mon, 26 Jun 2023 18:25:28 +0200
From: Andrew Jones <ajones@...tanamicro.com>
To: Conor Dooley <conor.dooley@...rochip.com>
Cc: palmer@...belt.com, conor@...nel.org,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Albert Ou <aou@...s.berkeley.edu>,
Heiko Stuebner <heiko.stuebner@...ll.eu>,
Evan Green <evan@...osinc.com>,
Sunil V L <sunilvl@...tanamicro.com>,
linux-riscv@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 9/9] RISC-V: try new extension properties in
of_early_processor_hartid()
On Mon, Jun 26, 2023 at 12:19:47PM +0100, Conor Dooley wrote:
> To fully deprecate the kernel's use of "riscv,isa",
> of_early_processor_hartid() needs to first try using the new properties,
> before falling back to "riscv,isa".
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> arch/riscv/kernel/cpu.c | 23 ++++++++++++++++++++++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c
> index 046d9d3dac16..332574f27c95 100644
> --- a/arch/riscv/kernel/cpu.c
> +++ b/arch/riscv/kernel/cpu.c
> @@ -61,8 +61,29 @@ int riscv_early_of_processor_hartid(struct device_node *node, unsigned long *har
> return -ENODEV;
> }
>
> + if (of_property_read_string(node, "riscv,isa-base", &isa))
> + goto old_interface;
> +
> + if (IS_ENABLED(CONFIG_32BIT) && strncasecmp(isa, "rv32i", 5))
> + return -ENODEV;
> +
> + if (IS_ENABLED(CONFIG_64BIT) && strncasecmp(isa, "rv64i", 5))
> + return -ENODEV;
> +
> + if (!of_property_present(node, "riscv,isa-extensions"))
> + return -ENODEV;
> +
> + if (of_property_match_string(node, "riscv,isa-extensions", "i") < 0 ||
> + of_property_match_string(node, "riscv,isa-extensions", "m") < 0 ||
> + of_property_match_string(node, "riscv,isa-extensions", "a") < 0)
> + return -ENODEV;
> +
> + return 0;
> +
> +old_interface:
> if (of_property_read_string(node, "riscv,isa", &isa)) {
> - pr_warn("CPU with hartid=%lu has no \"riscv,isa\" property\n", *hart);
> + pr_warn("CPU with hartid=%lu has no \"riscv,isa-base\" or \"riscv,isa\" property\n",
> + *hart);
> return -ENODEV;
> }
>
> --
> 2.40.1
>
Reviewed-by: Andrew Jones <ajones@...tanamicro.com>
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