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Date: Tue, 27 Jun 2023 22:50:53 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Luca Weiss <luca@...tu.xyz>, ~postmarketos/upstreaming@...ts.sr.ht,
phone-devel@...r.kernel.org, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] ARM: dts: qcom: msm8974: sort nodes by reg
On 27.06.2023 21:45, Luca Weiss wrote:
> Some nodes weren't sorted by reg, so fix that now. Now all nodes inside
> /soc should be sorted correctly.
>
> Signed-off-by: Luca Weiss <luca@...tu.xyz>
> ---
might conflict with Dmitry's SAW/SPM changes
https://lore.kernel.org/linux-arm-msm/20230625202547.174647-1-dmitry.baryshkov@linaro.org/T/#maf3c226ca76f1dee37464c465c2429d9bb1dcbb3
still
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
> arch/arm/boot/dts/qcom/qcom-msm8974.dtsi | 70 ++++++++++++++++----------------
> 1 file changed, 35 insertions(+), 35 deletions(-)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> index c6475837eda3..9aa8f9a273a8 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8974.dtsi
> @@ -334,6 +334,12 @@ apcs: syscon@...11000 {
> reg = <0xf9011000 0x1000>;
> };
>
> + saw_l2: power-controller@...12000 {
> + compatible = "qcom,saw2";
> + reg = <0xf9012000 0x1000>;
> + regulator;
> + };
> +
> timer@...20000 {
> #address-cells = <1>;
> #size-cells = <1>;
> @@ -393,52 +399,46 @@ frame@...28000 {
> };
> };
>
> - saw0: power-controller@...89000 {
> - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> - reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
> - };
> -
> - saw1: power-controller@...99000 {
> - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> - reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
> - };
> -
> - saw2: power-controller@...a9000 {
> - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> - reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
> - };
> -
> - saw3: power-controller@...b9000 {
> - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> - reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
> - };
> -
> - saw_l2: power-controller@...12000 {
> - compatible = "qcom,saw2";
> - reg = <0xf9012000 0x1000>;
> - regulator;
> - };
> -
> acc0: power-manager@...88000 {
> compatible = "qcom,kpss-acc-v2";
> reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
> };
>
> + saw0: power-controller@...89000 {
> + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> + reg = <0xf9089000 0x1000>, <0xf9009000 0x1000>;
> + };
> +
> acc1: power-manager@...98000 {
> compatible = "qcom,kpss-acc-v2";
> reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
> };
>
> + saw1: power-controller@...99000 {
> + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> + reg = <0xf9099000 0x1000>, <0xf9009000 0x1000>;
> + };
> +
> acc2: power-manager@...a8000 {
> compatible = "qcom,kpss-acc-v2";
> reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
> };
>
> + saw2: power-controller@...a9000 {
> + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> + reg = <0xf90a9000 0x1000>, <0xf9009000 0x1000>;
> + };
> +
> acc3: power-manager@...b8000 {
> compatible = "qcom,kpss-acc-v2";
> reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
> };
>
> + saw3: power-controller@...b9000 {
> + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2";
> + reg = <0xf90b9000 0x1000>, <0xf9009000 0x1000>;
> + };
> +
> sdhc_1: mmc@...24900 {
> compatible = "qcom,msm8974-sdhci", "qcom,sdhci-msm-v4";
> reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;
> @@ -1051,6 +1051,15 @@ kpss_out: endpoint {
> };
> };
>
> + bimc: interconnect@...80000 {
> + reg = <0xfc380000 0x6a000>;
> + compatible = "qcom,msm8974-bimc";
> + #interconnect-cells = <1>;
> + clock-names = "bus", "bus_a";
> + clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
> + <&rpmcc RPM_SMD_BIMC_A_CLK>;
> + };
> +
> gcc: clock-controller@...00000 {
> compatible = "qcom,gcc-msm8974";
> #clock-cells = <1>;
> @@ -1069,15 +1078,6 @@ rpm_msg_ram: sram@...28000 {
> reg = <0xfc428000 0x4000>;
> };
>
> - bimc: interconnect@...80000 {
> - reg = <0xfc380000 0x6a000>;
> - compatible = "qcom,msm8974-bimc";
> - #interconnect-cells = <1>;
> - clock-names = "bus", "bus_a";
> - clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
> - <&rpmcc RPM_SMD_BIMC_A_CLK>;
> - };
> -
> snoc: interconnect@...60000 {
> reg = <0xfc460000 0x4000>;
> compatible = "qcom,msm8974-snoc";
>
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