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Date:   Tue, 27 Jun 2023 19:16:48 +0530
From:   Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To:     Krishna Chaitanya Chundru <quic_krichai@...cinc.com>
Cc:     quic_vbadigan@...cinc.com, quic_ramkri@...cinc.com,
        linux-arm-msm@...r.kernel.org, konrad.dybcio@...aro.org,
        Manivannan Sadhasivam <mani@...nel.org>,
        Lorenzo Pieralisi <lpieralisi@...nel.org>,
        Krzysztof Wilczyński <kw@...ux.com>,
        Rob Herring <robh@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        "open list:PCIE ENDPOINT DRIVER FOR QUALCOMM" 
        <linux-pci@...r.kernel.org>,
        open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 3/3] PCI: qcom-ep: Add ICC bandwidth voting support

On Tue, Jun 27, 2023 at 06:33:01AM +0530, Krishna Chaitanya Chundru wrote:
> 
> On 6/23/2023 11:04 AM, Manivannan Sadhasivam wrote:
> > On Wed, Jun 14, 2023 at 07:54:26PM +0530, Krishna chaitanya chundru wrote:
> > > Add support to vote for ICC bandwidth based on the link
> > > speed and width.
> > > 
> > > This patch is inspired from pcie-qcom driver to add basic
> > > interconnect support.
> > > 
> > > Reference: commit c4860af88d0c ("PCI: qcom: Add basic interconnect
> > > support").
> > > Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
> > > ---
> > >   drivers/pci/controller/dwc/pcie-qcom-ep.c | 73 +++++++++++++++++++++++++++++++
> > >   1 file changed, 73 insertions(+)
> > > 
> > > diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
> > > index 19b3283..5d146ec 100644
> > > --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
> > > +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c

[...]

> > > +	/*
> > > +	 * Some Qualcomm platforms require interconnect bandwidth constraints
> > > +	 * to be set before enabling interconnect clocks.
> > > +	 *
> > > +	 * Set an initial average bandwidth corresponding to GEN1x1
> > Keep the comment same as the other driver.
> done
> > > +	 * for the pcie to mem path.
> > > +	 */
> > > +	ret = icc_set_bw(pcie_ep->icc_mem, 0, MBps_to_icc(PCIE_GEN1_BW_MBPS));
> > > +	if (ret) {
> > > +		dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n",
> > > +			ret);
> > > +		goto err_phy_exit;
> > PHY should be powered off in the case of error.
> > 
> > Rest looks good.
> > 
> > - Mani
> 
> For platforms which need ICC it is must to vote for interconnect so better
> to power off in case of error.
> 

That's what I'm also suggesting. Currently used err_phy_exit path doesn't power
off the PHY.

- Mani

> -KC
> 
> > > +	}
> > > +
> > >   	return 0;
> > >   err_phy_exit:
> > > @@ -550,6 +618,10 @@ static int qcom_pcie_ep_get_resources(struct platform_device *pdev,
> > >   	if (IS_ERR(pcie_ep->phy))
> > >   		ret = PTR_ERR(pcie_ep->phy);
> > > +	pcie_ep->icc_mem = devm_of_icc_get(dev, "pcie-mem");
> > > +	if (IS_ERR(pcie_ep->icc_mem))
> > > +		ret = PTR_ERR(pcie_ep->icc_mem);
> > > +
> > >   	return ret;
> > >   }
> > > @@ -572,6 +644,7 @@ static irqreturn_t qcom_pcie_ep_global_irq_thread(int irq, void *data)
> > >   	} else if (FIELD_GET(PARF_INT_ALL_BME, status)) {
> > >   		dev_dbg(dev, "Received BME event. Link is enabled!\n");
> > >   		pcie_ep->link_status = QCOM_PCIE_EP_LINK_ENABLED;
> > > +		qcom_pcie_ep_icc_update(pcie_ep);
> > >   	} else if (FIELD_GET(PARF_INT_ALL_PM_TURNOFF, status)) {
> > >   		dev_dbg(dev, "Received PM Turn-off event! Entering L23\n");
> > >   		val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
> > > -- 
> > > 2.7.4
> > > 

-- 
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