linux-kernel - Re: [PATCH v12 20/22] x86/virt/tdx: Allow SEAMCALL to handle #UD and #GP

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 28 Jun 2023 23:16:41 +0200
From:   Peter Zijlstra <peterz@...radead.org>
To:     Kai Huang <kai.huang@...el.com>
Cc:     linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
        linux-mm@...ck.org, x86@...nel.org, dave.hansen@...el.com,
        kirill.shutemov@...ux.intel.com, tony.luck@...el.com,
        tglx@...utronix.de, bp@...en8.de, mingo@...hat.com, hpa@...or.com,
        seanjc@...gle.com, pbonzini@...hat.com, david@...hat.com,
        dan.j.williams@...el.com, rafael.j.wysocki@...el.com,
        ashok.raj@...el.com, reinette.chatre@...el.com,
        len.brown@...el.com, ak@...ux.intel.com, isaku.yamahata@...el.com,
        ying.huang@...el.com, chao.gao@...el.com,
        sathyanarayanan.kuppuswamy@...ux.intel.com, nik.borisov@...e.com,
        bagasdotme@...il.com, sagis@...gle.com, imammedo@...hat.com
Subject: Re: [PATCH v12 20/22] x86/virt/tdx: Allow SEAMCALL to handle #UD and
 #GP

On Wed, Jun 28, 2023 at 11:11:32PM +0200, Peter Zijlstra wrote:
> --- a/arch/x86/virt/vmx/tdx/tdxcall.S
> +++ b/arch/x86/virt/vmx/tdx/tdxcall.S
> @@ -17,37 +17,44 @@
>   *            TDX module and hypercalls to the VMM.
>   * SEAMCALL - used by TDX hosts to make requests to the
>   *            TDX module.
> + *
> + *-------------------------------------------------------------------------
> + * TDCALL/SEAMCALL ABI:
> + *-------------------------------------------------------------------------
> + * Input Registers:
> + *
> + * RAX                 - TDCALL Leaf number.
> + * RCX,RDX,R8-R9       - TDCALL Leaf specific input registers.
> + *
> + * Output Registers:
> + *
> + * RAX                 - TDCALL instruction error code.
> + * RCX,RDX,R8-R11      - TDCALL Leaf specific output registers.
> + *
> + *-------------------------------------------------------------------------
> + *
> + * __tdx_module_call() function ABI:
> + *
> + * @fn   (RDI)         - TDCALL Leaf ID,    moved to RAX
> + * @regs (RSI)         - struct tdx_regs pointer
> + *
> + * Return status of TDCALL via RAX.
>   */
> +.macro TDX_MODULE_CALL host:req ret:req
> +	FRAME_BEGIN
>  
> +	mov	%rdi, %rax
> +	mov	$TDX_SEAMCALL_VMFAILINVALID, %rdi
>  
> +	mov	TDX_MODULE_rcx(%rsi), %rcx
> +	mov	TDX_MODULE_rdx(%rsi), %rdx
> +	mov	TDX_MODULE_r8(%rsi),  %r8
> +	mov	TDX_MODULE_r9(%rsi),  %r9
> +//	mov	TDX_MODULE_r10(%rsi), %r10
> +//	mov	TDX_MODULE_r11(%rsi), %r11
>  
> +.if \host
> +1:	seamcall
>  	/*
>  	 * SEAMCALL instruction is essentially a VMExit from VMX root
>  	 * mode to SEAM VMX root mode.  VMfailInvalid (CF=1) indicates
	...
>  	 * This value will never be used as actual SEAMCALL error code as
>  	 * it is from the Reserved status code class.
>  	 */
> +	cmovc	%rdi, %rax
>  2:
> +.else
>  	tdcall
> +.endif
>  
> +.if \ret
> +	movq %rcx, TDX_MODULE_rcx(%rsi)
> +	movq %rdx, TDX_MODULE_rdx(%rsi)
> +	movq %r8,  TDX_MODULE_r8(%rsi)
> +	movq %r9,  TDX_MODULE_r9(%rsi)
> +	movq %r10, TDX_MODULE_r10(%rsi)
> +	movq %r11, TDX_MODULE_r11(%rsi)
> +.endif
> +
> +	FRAME_END
> +	RET
> +
> +.if \host
> +3:
> +	mov	$TDX_SW_ERROR, %rdi
> +	or	%rdi, %rax
> +	jmp 2b
>  
> +	_ASM_EXTABLE_FAULT(1b, 3b)
> +.endif
>  .endm

Isn't that much simpler?