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Message-ID: <20230630151436.155586-1-nfraprado@collabora.com>
Date: Fri, 30 Jun 2023 11:14:06 -0400
From: Nícolas F. R. A. Prado
<nfraprado@...labora.com>
To: Matthias Brugger <matthias.bgg@...il.com>,
Hans Verkuil <hverkuil-cisco@...all.nl>
Cc: AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>, kernel@...labora.com,
Nícolas F. R. A. Prado
<nfraprado@...labora.com>,
Andrew-CT Chen <andrew-ct.chen@...iatek.com>,
Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Tiffany Lin <tiffany.lin@...iatek.com>,
Yunfei Dong <yunfei.dong@...iatek.com>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-media@...r.kernel.org,
linux-mediatek@...ts.infradead.org
Subject: [PATCH v5 0/7] Enable decoder for mt8183
This series enables the hardware decoder present on mt8183. At first
glance, the only missing piece is the devicetree node for it, however,
simply adding it as is would cause an address collision between the
first register iospace and the clock-controller node, so a rework of the
dt-binding and driver, as well as addition of a new syscon phandle
property, were needed first.
Tested that H264 decoding works with the hardware decoder on
mt8183-kukui-jacuzzi-juniper-sku16, giving a fluster score of 98/135 on
the JVT-AVC_V1 test suite. And ensured other SoCs (MT8192 and MT8195)
still work as usual.
Changes in v5:
- Added explicit include to patch 5 following 0day report
Changes in v4:
- Removed VDEC_SYS reg from mt8173 as well
- Made driver handling cleaner
Changes in v3:
- Switched the handling of the VDEC_HW_ACTIVE bit to use a syscon
instead of the 'active' clock
Changes in v2:
- Merged commit 1 (media: dt-bindings: mediatek,vcodec: Allow single
clock for mt8183) into commit 3 (media: dt-bindings: mediatek,vcodec:
Remove VDEC_SYS for mt8183)
- Further constrained properties in dt-binding
- Added CLK_IGNORE_UNUSED flag to active clock
- Reformatted reg-names in DT node
Nícolas F. R. A. Prado (6):
media: dt-bindings: mediatek,vcodec: Allow single clock for mt8183
media: dt-bindings: mediatek,vcodec: Don't require assigned-clocks
media: dt-bindings: mediatek,vcodec: Remove VDEC_SYS register space
media: mediatek: vcodec: Define address for VDEC_HW_ACTIVE
media: mediatek: vcodec: Read HW active status from syscon
arm64: dts: mediatek: mt8173: Drop VDEC_SYS reg from decoder
Yunfei Dong (1):
arm64: dts: mediatek: mt8183: Add decoder
.../media/mediatek,vcodec-decoder.yaml | 67 ++++++++++++----
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 8 +-
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 30 ++++++++
.../mediatek/vcodec/mtk_vcodec_dec_drv.c | 77 ++++++++++++++++---
.../mediatek/vcodec/mtk_vcodec_dec_hw.c | 4 +-
.../mediatek/vcodec/mtk_vcodec_dec_hw.h | 3 +-
.../platform/mediatek/vcodec/mtk_vcodec_drv.h | 1 +
.../mediatek/vcodec/mtk_vcodec_util.c | 15 ++++
.../mediatek/vcodec/mtk_vcodec_util.h | 2 +
.../mediatek/vcodec/vdec/vdec_vp8_if.c | 10 +--
10 files changed, 178 insertions(+), 39 deletions(-)
--
2.41.0
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