[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZJ7xjE0qMjpYIiB/@google.com>
Date: Fri, 30 Jun 2023 08:15:24 -0700
From: Sean Christopherson <seanjc@...gle.com>
To: Gil Neiger <gil.neiger@...el.com>
Cc: Weijiang Yang <weijiang.yang@...el.com>,
Chao Gao <chao.gao@...el.com>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"peterz@...radead.org" <peterz@...radead.org>,
"rppt@...nel.org" <rppt@...nel.org>,
"binbin.wu@...ux.intel.com" <binbin.wu@...ux.intel.com>,
Rick P Edgecombe <rick.p.edgecombe@...el.com>,
"john.allen@....com" <john.allen@....com>
Subject: Re: [PATCH v3 10/21] KVM:x86: Add #CP support in guest exception classification
On Fri, Jun 30, 2023, Gil Neiger wrote:
> Intel will not produce any CPU with CET that does not enumerate IA32_VMX_BASIC[56] as 1.
>
> One can check that bit before injecting a #CP with error code, but it should
> not be necessary if CET is enumerated.
>
> Of course, if the KVM may run as a guest of another VMM/hypervisor, it may be
> that the virtual CPU in which KVM operates may enumerate CET but clear the
> bit in IA32_VMX_BASIC.
Yeah, I think KVM should be paranoid and expose CET to the guest if and only if
IA32_VMX_BASIC[56] is 1. That'll also help validate nested support, e.g. will
make it more obvious if userspace+KVM provides a "bad" model to L1.
Powered by blists - more mailing lists