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Message-ID: <23527062-e7cd-ce06-ba96-f3f3a81518b2@intel.com>
Date:   Sat, 1 Jul 2023 09:54:00 +0800
From:   "Yang, Weijiang" <weijiang.yang@...el.com>
To:     "Neiger, Gil" <gil.neiger@...el.com>,
        "Gao, Chao" <chao.gao@...el.com>
CC:     "Christopherson,, Sean" <seanjc@...gle.com>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "rppt@...nel.org" <rppt@...nel.org>,
        "binbin.wu@...ux.intel.com" <binbin.wu@...ux.intel.com>,
        "Edgecombe, Rick P" <rick.p.edgecombe@...el.com>,
        "john.allen@....com" <john.allen@....com>
Subject: Re: [PATCH v3 10/21] KVM:x86: Add #CP support in guest exception
 classification


On 6/30/2023 11:05 PM, Neiger, Gil wrote:
> Intel will not produce any CPU with CET that does not enumerate IA32_VMX_BASIC[56] as 1.
>
> One can check that bit before injecting a #CP with error code, but it should not be necessary if CET is enumerated.
>
> Of course, if the KVM may run as a guest of another VMM/hypervisor, it may be that the virtual CPU in which KVM operates may enumerate CET but clear the bit in IA32_VMX_BASIC.
>
> 				- Gil
Thanks Gil for clarity!
>
> -----Original Message-----
> From: Yang, Weijiang <weijiang.yang@...el.com>
> Sent: Friday, June 30, 2023 05:05
> To: Gao, Chao <chao.gao@...el.com>
> Cc: Christopherson,, Sean <seanjc@...gle.com>; pbonzini@...hat.com; kvm@...r.kernel.org; linux-kernel@...r.kernel.org; peterz@...radead.org; rppt@...nel.org; binbin.wu@...ux.intel.com; Edgecombe, Rick P <rick.p.edgecombe@...el.com>; john.allen@....com; Neiger, Gil <gil.neiger@...el.com>
> Subject: Re: [PATCH v3 10/21] KVM:x86: Add #CP support in guest exception classification
>
>
> On 6/30/2023 6:27 PM, Chao Gao wrote:
> [...]

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