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Message-Id: <20230702185149.44212-2-krzysztof.kozlowski@linaro.org>
Date: Sun, 2 Jul 2023 20:51:49 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH 2/2] arm64: dts: imx8mm: split PCIe ranges
Two entries are expected for PCIe ranges.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
---
Not tested on HW.
---
arch/arm64/boot/dts/freescale/imx8mm.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
index d6b36f04f3dc..a831fd8e3706 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
@@ -1345,8 +1345,8 @@ pcie0: pcie@...00000 {
#size-cells = <2>;
device_type = "pci";
bus-range = <0x00 0xff>;
- ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000 /* downstream I/O 64KB */
- 0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
+ ranges = <0x81000000 0 0x00000000 0x1ff80000 0 0x00010000>, /* downstream I/O 64KB */
+ <0x82000000 0 0x18000000 0x18000000 0 0x07f00000>; /* non-prefetchable memory */
num-lanes = <1>;
num-viewport = <4>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
--
2.34.1
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