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Message-Id: <20230702203429.237615-2-prabhakar.mahadev-lad.rj@bp.renesas.com>
Date:   Sun,  2 Jul 2023 21:34:24 +0100
From:   Prabhakar <prabhakar.csengg@...il.com>
To:     Arnd Bergmann <arnd@...db.de>,
        Conor Dooley <conor.dooley@...rochip.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Guo Ren <guoren@...nel.org>,
        Andrew Jones <ajones@...tanamicro.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        Samuel Holland <samuel@...lland.org>,
        linux-riscv@...ts.infradead.org,
        Christoph Hellwig <hch@...radead.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org,
        Prabhakar <prabhakar.csengg@...il.com>,
        Biju Das <biju.das.jz@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        Heiko Stuebner <heiko@...ech.de>
Subject: [PATCH v10 1/6] riscv: asm: vendorid_list: Add Andes Technology to the vendors list

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>

Add Andes Technology to the vendors list.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Reviewed-by: Heiko Stuebner <heiko@...ech.de>
Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
Tested-by: Conor Dooley <conor.dooley@...rochip.com> # tyre-kicking on a d1
---
v9 -> v10
* Included TB tag from Conor

v8 -> v9
* Included RB tag from Geert

v7 -> v8
* No change

v6 -> v7
* No change

v5 -> v6
* No change

v4 -> v5
* Included RB tags

RFC v3 -> v4
* New patch
---
 arch/riscv/include/asm/vendorid_list.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/riscv/include/asm/vendorid_list.h b/arch/riscv/include/asm/vendorid_list.h
index cb89af3f0704..e55407ace0c3 100644
--- a/arch/riscv/include/asm/vendorid_list.h
+++ b/arch/riscv/include/asm/vendorid_list.h
@@ -5,6 +5,7 @@
 #ifndef ASM_VENDOR_LIST_H
 #define ASM_VENDOR_LIST_H
 
+#define ANDESTECH_VENDOR_ID	0x31e
 #define SIFIVE_VENDOR_ID	0x489
 #define THEAD_VENDOR_ID		0x5b7
 
-- 
2.34.1

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