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Message-ID: <889bbee2-db9c-c1dd-dc8a-cdc436f1dfd8@linaro.org>
Date:   Sun, 2 Jul 2023 12:47:09 +0200
From:   Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To:     Julien Stephan <jstephan@...libre.com>
Cc:     Phi-bang Nguyen <pnguyen@...libre.com>,
        Andy Hsieh <andy.hsieh@...iatek.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        Conor Dooley <conor+dt@...nel.org>,
        daoyuan huang <daoyuan.huang@...iatek.com>,
        devicetree@...r.kernel.org,
        Florian Sylvestre <fsylvestre@...libre.com>,
        Hans Verkuil <hverkuil-cisco@...all.nl>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-mediatek@...ts.infradead.org, linux-media@...r.kernel.org,
        Louis Kuo <louis.kuo@...iatek.com>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Mauro Carvalho Chehab <mchehab@...nel.org>,
        Moudy Ho <moudy.ho@...iatek.com>,
        Ping-Hsun Wu <ping-hsun.wu@...iatek.com>,
        Rob Herring <robh+dt@...nel.org>,
        Vasily Gorbik <gor@...ux.ibm.com>
Subject: Re: [PATCH 3/4] dt-bindings: media: add mediatek ISP3.0 camsv

On 28/06/2023 16:52, Julien Stephan wrote:
> From: Phi-bang Nguyen <pnguyen@...libre.com>
> 
> This adds the bindings, for the ISP3.0 camsv module embedded in
> some Mediatek SoC, such as the mt8365

Thank you for your patch. There is something to discuss/improve.


> +
> +description:
> +  The CAMSV is a set of DMA engines connected to the SENINF CSI-2
> +  receivers. The number of CAMSVs depend on the SoC model.
> +
> +properties:
> +  compatible:
> +    const: mediatek,mt8365-camsv
> +
> +  reg:
> +    maxItems: 3

Describe the items (items with description) instead.

> +

...

> +
> +examples:
> +  - |
> +    #include <dt-bindings/interrupt-controller/arm-gic.h>
> +    #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/clock/mediatek,mt8365-clk.h>
> +    #include <dt-bindings/memory/mediatek,mt8365-larb-port.h>
> +    #include <dt-bindings/power/mediatek,mt8365-power.h>
> +
> +    soc {
> +        #address-cells = <2>;
> +        #size-cells = <2>;
> +
> +        camsv1: camsv@...50000 {
> +            compatible = "mediatek,mt8365-camsv";
> +            reg = <0 0x15050000 0 0x0040>,
> +            <0 0x15050208 0 0x0020>,
> +            <0 0x15050400 0 0x0100>;

Fix the alignment.

> +            interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_LOW>;
> +            clocks = <&camsys CLK_CAM>,
> +            <&camsys CLK_CAMTG>,
> +            <&camsys CLK_CAMSV0>;

Everywhere...


Best regards,
Krzysztof

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