lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <mhng-bb5689ac-5b69-423f-8ea5-42938d5bab85@palmer-ri-x1c9>
Date:   Mon, 03 Jul 2023 11:45:43 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...osinc.com>
To:     Marc Zyngier <maz@...nel.org>
CC:     linux-kernel@...r.kernel.org, Conor Dooley <conor@...nel.org>,
        apatel@...tanamicro.com,
        Linus Torvalds <torvalds@...ux-foundation.org>
Subject:     Re: [PATCH] risc-v: Fix order of IPI enablement vs RCU startup

On Mon, 03 Jul 2023 11:31:26 PDT (-0700), Marc Zyngier wrote:
> Conor reports that risc-v tries to enable IPIs before telling the
> core code to enable RCU. With the introduction of the mapple tree
> as a backing store for the irq descriptors, this results in
> a very shouty boot sequence, as RCU is legitimately upset.
>
> Restore some sanity by moving the risc_ipi_enable() call after
> notify_cpu_starting(), which explicitly enables RCU on the calling
> CPU.
>
> Fixes: 832f15f42646 ("RISC-V: Treat IPIs as normal Linux IRQs")
> Reported-by: Conor Dooley <conor@...nel.org>
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> Link: https://lore.kernel.org/r/20230703-dupe-frying-79ae2ccf94eb@spud
> Cc: Anup Patel <apatel@...tanamicro.com>
> Cc: Palmer Dabbelt <palmer@...osinc.com>
> Cc: Linus Torvalds <torvalds@...ux-foundation.org>
> ---
>  arch/riscv/kernel/smpboot.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> index bb0b76e1a6d4..f4d6acb38dd0 100644
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -238,10 +238,11 @@ asmlinkage __visible void smp_callin(void)
>  	mmgrab(mm);
>  	current->active_mm = mm;
>
> -	riscv_ipi_enable();
> -
>  	store_cpu_topology(curr_cpuid);
>  	notify_cpu_starting(curr_cpuid);
> +
> +	riscv_ipi_enable();
> +
>  	numa_add_cpu(curr_cpuid);
>  	set_cpu_online(curr_cpuid, 1);
>  	probe_vendor_features(curr_cpuid);

Thanks.  I was going to send another PR this week anyway, I can just 
pick this up if you want?  Either way I'll look, I've still got a few 
hiccups from trying to clean up my staging bits post-merge but hopefully 
it's not too bad...

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ