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Message-ID: <20230703-baffling-pesticide-e83e74506d2b@spud>
Date: Mon, 3 Jul 2023 21:04:37 +0100
From: Conor Dooley <conor@...nel.org>
To: Marc Zyngier <maz@...nel.org>
Cc: linux-kernel@...r.kernel.org, Anup Patel <apatel@...tanamicro.com>,
Palmer Dabbelt <palmer@...osinc.com>,
Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH] risc-v: Fix order of IPI enablement vs RCU startup
On Mon, Jul 03, 2023 at 07:31:26PM +0100, Marc Zyngier wrote:
> Conor reports that risc-v tries to enable IPIs before telling the
> core code to enable RCU. With the introduction of the mapple tree
> as a backing store for the irq descriptors, this results in
> a very shouty boot sequence, as RCU is legitimately upset.
>
> Restore some sanity by moving the risc_ipi_enable() call after
> notify_cpu_starting(), which explicitly enables RCU on the calling
> CPU.
>
> Fixes: 832f15f42646 ("RISC-V: Treat IPIs as normal Linux IRQs")
> Reported-by: Conor Dooley <conor@...nel.org>
RCU no longer chucks the toys at least, and none of the wheels seem to
have fallen off the pram in the process.
Tested-by: Conor Dooley <conor.dooley@...rochip.com>
Thanks guys!
> Signed-off-by: Marc Zyngier <maz@...nel.org>
> Link: https://lore.kernel.org/r/20230703-dupe-frying-79ae2ccf94eb@spud
> Cc: Anup Patel <apatel@...tanamicro.com>
> Cc: Palmer Dabbelt <palmer@...osinc.com>
> Cc: Linus Torvalds <torvalds@...ux-foundation.org>
> ---
> arch/riscv/kernel/smpboot.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
> index bb0b76e1a6d4..f4d6acb38dd0 100644
> --- a/arch/riscv/kernel/smpboot.c
> +++ b/arch/riscv/kernel/smpboot.c
> @@ -238,10 +238,11 @@ asmlinkage __visible void smp_callin(void)
> mmgrab(mm);
> current->active_mm = mm;
>
> - riscv_ipi_enable();
> -
> store_cpu_topology(curr_cpuid);
> notify_cpu_starting(curr_cpuid);
> +
> + riscv_ipi_enable();
> +
> numa_add_cpu(curr_cpuid);
> set_cpu_online(curr_cpuid, 1);
> probe_vendor_features(curr_cpuid);
> --
> 2.34.1
>
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