lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <ZKKeX4LU0_8qpTxk@FVFF77S0Q05N>
Date:   Mon, 3 Jul 2023 11:09:35 +0100
From:   Mark Rutland <mark.rutland@....com>
To:     Rob Herring <robh@...nel.org>
Cc:     Will Deacon <will@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] perf: pmuv3: Add Cortex-A520, Cortex-A715, and
 Cortex-A720 PMUs

On Fri, Jun 30, 2023 at 12:56:02PM -0600, Rob Herring wrote:
> Add support for the Arm Cortex-A520, Cortex-A715, and Cortex-A720 CPU
> PMUs. They are straight-forward additions with just new compatible
> strings.
> 
> Signed-off-by: Rob Herring <robh@...nel.org>

Acked-by: Mark Rutland <mark.rutland@....com>

Mark.

> ---
>  drivers/perf/arm_pmuv3.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
> index 08b3a1bf0ef6..0bf522b05dc3 100644
> --- a/drivers/perf/arm_pmuv3.c
> +++ b/drivers/perf/arm_pmuv3.c
> @@ -1266,7 +1266,10 @@ PMUV3_INIT_SIMPLE(armv8_cortex_a76)
>  PMUV3_INIT_SIMPLE(armv8_cortex_a77)
>  PMUV3_INIT_SIMPLE(armv8_cortex_a78)
>  PMUV3_INIT_SIMPLE(armv9_cortex_a510)
> +PMUV3_INIT_SIMPLE(armv9_cortex_a520)
>  PMUV3_INIT_SIMPLE(armv9_cortex_a710)
> +PMUV3_INIT_SIMPLE(armv9_cortex_a715)
> +PMUV3_INIT_SIMPLE(armv9_cortex_a720)
>  PMUV3_INIT_SIMPLE(armv8_cortex_x1)
>  PMUV3_INIT_SIMPLE(armv9_cortex_x2)
>  PMUV3_INIT_SIMPLE(armv8_neoverse_e1)
> @@ -1334,7 +1337,10 @@ static const struct of_device_id armv8_pmu_of_device_ids[] = {
>  	{.compatible = "arm,cortex-a77-pmu",	.data = armv8_cortex_a77_pmu_init},
>  	{.compatible = "arm,cortex-a78-pmu",	.data = armv8_cortex_a78_pmu_init},
>  	{.compatible = "arm,cortex-a510-pmu",	.data = armv9_cortex_a510_pmu_init},
> +	{.compatible = "arm,cortex-a520-pmu",	.data = armv9_cortex_a520_pmu_init},
>  	{.compatible = "arm,cortex-a710-pmu",	.data = armv9_cortex_a710_pmu_init},
> +	{.compatible = "arm,cortex-a715-pmu",	.data = armv9_cortex_a715_pmu_init},
> +	{.compatible = "arm,cortex-a720-pmu",	.data = armv9_cortex_a720_pmu_init},
>  	{.compatible = "arm,cortex-x1-pmu",	.data = armv8_cortex_x1_pmu_init},
>  	{.compatible = "arm,cortex-x2-pmu",	.data = armv9_cortex_x2_pmu_init},
>  	{.compatible = "arm,neoverse-e1-pmu",	.data = armv8_neoverse_e1_pmu_init},
> -- 
> 2.40.1
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ