[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAMuHMdXW9Vrk8y+UOAHaRdAkEwy6gXNGgdRAawPLrEqDHB+cvQ@mail.gmail.com>
Date: Mon, 3 Jul 2023 13:47:46 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Cc: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Magnus Damm <magnus.damm@...il.com>,
linux-renesas-soc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Chris Paterson <Chris.Paterson2@...esas.com>,
Biju Das <biju.das@...renesas.com>
Subject: Re: [PATCH v2 4/5] arm64: dts: renesas: r9a09g011: Add CSI nodes
On Thu, Jun 22, 2023 at 1:34 PM Fabrizio Castro
<fabrizio.castro.jz@...esas.com> wrote:
> The Renesas RZ/V2M comes with 6 Clocked Serial Interface (CSI)
> IPs (CSI0, CSI1, CSI2, CSI3, CSI4, CSI5), but Linux is only
> allowed access to CSI0 and CSI4.
>
> This commit adds SoC specific device tree support for CSI0 and
> CSI4.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> ---
>
> v2: no changes
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-devel for v6.6.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
Powered by blists - more mailing lists