linux-kernel - Re: [PATCH 0/5] Add interconnects to QUPs on SM8250

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Message-ID: <sd2ultz22evkl4at4aq54qybhcvtchgxcgdwldmn6s4ia66szr@4abuxln7b3bu>
Date:   Mon, 3 Jul 2023 07:58:55 -0700
From:   Bjorn Andersson <andersson@...nel.org>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>
Cc:     Andy Gross <agross@...nel.org>, Mark Brown <broonie@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Andi Shyti <andi.shyti@...nel.org>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        linux-arm-msm@...r.kernel.org, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-serial@...r.kernel.org, linux-i2c@...r.kernel.org
Subject: Re: [PATCH 0/5] Add interconnects to QUPs on SM8250

On Mon, Jul 03, 2023 at 03:31:09PM +0200, Konrad Dybcio wrote:
> SM8250 (like SM8150 but unlike all other QUP-equipped SoCs) doesn't
> provide a qup-core path. Adjust the bindings and drivers as necessary,
> and then describe the icc paths in the device tree. This makes it possible
> for interconnect sync_state succeed so long as you don't use UFS.
> 

The "qup-core" path is a vote between two nodes on the QUP0 BCM, to
provide a frequency vote on the QUP core(s). Both SM8150 and SM8250 has
this BCM, but as you point out it's not exposed through the interconnect
provider.

I don't know why this is, but I think it would be preferable to amend
the provider.

Regards,
Bjorn

> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
> ---
> Konrad Dybcio (5):
>       dt-bindings: spi: spi-geni-qcom: Allow no qup-core icc path
>       dt-bindings: serial: geni-qcom: Allow no qup-core icc path
>       dt-bindings: i2c: qcom,i2c-geni: Allow no qup-core icc path
>       soc: qcom: geni-se: Allow any combination of icc paths
>       arm64: dts: qcom: sm8250: Add interconnects and power-domains to QUPs
> 
>  .../bindings/i2c/qcom,i2c-geni-qcom.yaml           |  27 ++--
>  .../bindings/serial/qcom,serial-geni-qcom.yaml     |  26 ++--
>  .../bindings/spi/qcom,spi-geni-qcom.yaml           |  15 ++-
>  arch/arm64/boot/dts/qcom/sm8250.dtsi               | 150 +++++++++++++++++++++
>  drivers/soc/qcom/qcom-geni-se.c                    |   9 +-
>  5 files changed, 204 insertions(+), 23 deletions(-)
> ---
> base-commit: 296d53d8f84ce50ffaee7d575487058c8d437335
> change-id: 20230703-topic-8250_qup_icc-61768a34c7ec
> 
> Best regards,
> -- 
> Konrad Dybcio <konrad.dybcio@...aro.org>
>