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Date:   Tue, 4 Jul 2023 13:02:04 -0400
From:   Hugo Villeneuve <hugo@...ovil.com>
To:     Hugo Villeneuve <hugo@...ovil.com>
Cc:     Fabio Estevam <festevam@...il.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        Pierluigi Passaro <pierluigi.p@...iscite.com>,
        Nate Drude <nate.d@...iscite.com>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        NXP Linux Team <linux-imx@....com>,
        Hugo Villeneuve <hvilleneuve@...onoff.com>,
        Krzysztof Kozlowski <krzk@...nel.org>,
        devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mn-var-som-symphony: fix USB OTG

On Tue, 4 Jul 2023 12:55:41 -0400
Hugo Villeneuve <hugo@...ovil.com> wrote:

> On Tue, 4 Jul 2023 13:33:10 -0300
> Fabio Estevam <festevam@...il.com> wrote:
> 
> > Adding some Variscite folks in case they can help to clarify.
> > 
> > On Tue, Jul 4, 2023 at 1:20 PM Krzysztof Kozlowski
> > <krzysztof.kozlowski@...aro.org> wrote:
> > >
> > > On 04/07/2023 17:31, Hugo Villeneuve wrote:
> > > > On Tue, 4 Jul 2023 17:08:12 +0200
> > > > Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org> wrote:
> > > >
> > > >> On 04/07/2023 17:02, Hugo Villeneuve wrote:
> > > >>> From: Hugo Villeneuve <hvilleneuve@...onoff.com>
> > > >>>
> > > >>> USB OTG is currently broken on the Variscite Symphony EVK and imx8mn
> > > >>> nano SOM.
> > > >>>
> > > >>> Import changes from linux-5.15 branch of  doen't giveto fix it.
> > > >>>
> > > >>> Link: https://github.com/varigit/linux-imx.git
> > > >>> Fixes: 7358e05bddca ("arm64: dts: imx8mn-var-som-symphony: Add Variscite Symphony board with VAR-SOM-MX8MN")
> > > >>> Signed-off-by: Hugo Villeneuve <hvilleneuve@...onoff.com>
> > > >>> ---
> > > >>>  .../dts/freescale/imx8mn-var-som-symphony.dts | 37 ++++++++++++++++++-
> > > >>>  1 file changed, 35 insertions(+), 2 deletions(-)
> > > >>>
> > > >>> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts
> > > >>> index 406a711486da..aef89198f24c 100644
> > > >>> --- a/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts
> > > >>> +++ b/arch/arm64/boot/dts/freescale/imx8mn-var-som-symphony.dts
> > > >>> @@ -6,6 +6,7 @@
> > > >>>
> > > >>>  /dts-v1/;
> > > >>>
> > > >>> +#include <dt-bindings/usb/pd.h>
> > > >>>  #include "imx8mn-var-som.dtsi"
> > > >>>
> > > >>>  / {
> > > >>> @@ -104,10 +105,29 @@ extcon_usbotg1: typec@3d {
> > > >>>             compatible = "nxp,ptn5150";
> > > >>>             reg = <0x3d>;
> > > >>>             interrupt-parent = <&gpio1>;
> > > >>> -           interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
> > > >>> +           interrupts = <11 IRQ_TYPE_NONE>;
> > > >>
> > > >> That's surprising, why?
> > > >
> > > > Hi,
> > > > the varigit repos log or source code has no information about this
> > > > particular configuration.
> > > >
> > > > In the schematics, the interrupt output pin of the PTN5150 is connected
> > > > to two different resistors, one of these being connected to GPIO1 pin
> > > > 11. But these two resistors are not assembled on any versions of the
> > > > board, so the interrupt pin is currently not used.
> > >
> > > OK, so there is no interrupt, but not interrupt of type none. Just drop
> > > the property and make it optional in the bindings. The driver however
> > > requires the interrupt, so I wonder how the device is going to work
> > > without it?
> > >
> > > Are you sure that interrupt line is not shorted instead of missing resistor?
> 
> Hi,
> Link for schematics:
> https://www.variscite.com/wp-content/uploads/2019/07/Symphony-Board-Schematics.zip
> 
> In the schematics, both resistors R106 (connected to PTN5150 on one
> side and GPIO1 pin 11 on the other size) and R131 have the text "NC"
> near their reference designator. And I visually confirm that R106
> and R131 are not soldered on the board.
> 
> However, GPIO1 pin 11 (the interrupt pin configured in the DTS) is
> also connected to PTN5150 pin 9 (ID), which has a simple pull-up to
> 3.3V. So from what I can see/deduce, the DTS interrupt pin
> will always be 3.3V, and never pulled to GND.

Ok, I tought pin 9 (ID) was an input, but it is in fact an output
driven by the PTN5150 so the last sentence is incorrect.

Hugo.

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