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Message-ID: <20230705215611.5f96584e@aktux>
Date: Wed, 5 Jul 2023 21:56:11 +0200
From: Andreas Kemnade <andreas@...nade.info>
To: Mark Brown <broonie@...nel.org>
Cc: bcousson@...libre.com, tony@...mide.com, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
lgirdwood@...il.com, perex@...ex.cz, tiwai@...e.com,
peter.ujfalusi@...il.com, jarkko.nikula@...mer.com,
dmitry.torokhov@...il.com, linux-omap@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
alsa-devel@...a-project.org
Subject: Re: [PATCH 2/3] ASoC: tlv320aic3x: use BCLK instead of MCLK if not
in master mode
On Wed, 5 Jul 2023 20:21:58 +0100
Mark Brown <broonie@...nel.org> wrote:
> On Wed, Jul 05, 2023 at 09:03:23PM +0200, Andreas Kemnade wrote:
>
> > + /* probably no mclk if not master, so rely on bitclk */
> > + if (!aic3x->master)
> > + clk_id = 2;
> > +
>
> This is fairly clearly a massive hack, we're just silently ignoring the
> clock we were asked to configure and choosing another one which is
> likely at a different rate to that we were expecting and sadly the
> driver didn't provide an automatic mode due to how old it is. We also
> appear to try to use the configured clock rate during PLL setup which
> still happens in hw_params() even with this change which is a bit of a
> concern here. Are you sure hw_params ends up doing the right thing, and
> that there are no other systems that get broken by this (perhaps ones
> sending a lower BCLK for example)?
Yes, I am not that happy myself with that one. Possible victim is
keystone-k2g-evm.dts.
I looked for if (master) things and found the pll enable/disable connected to it.
But that is not the whole story...
>
> It would be nicer to set the clock via the DT bindings, ideally with the
> clock bindings...
I found no path from these simple-audio-card things to provide a clk_id
to set_dai_sysclk. I would of course prefer such a thing. Do I have overlooked
something?
Regards,
Andreas
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