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Message-ID: <20230705093702.6c0421d7@xps-13>
Date: Wed, 5 Jul 2023 09:37:02 +0200
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Arseniy Krasnov <AVKrasnov@...rdevices.ru>
Cc: Liang Yang <liang.yang@...ogic.com>,
Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
<oxffffaa@...il.com>, <kernel@...rdevices.ru>,
<linux-mtd@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-amlogic@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCH v2 1/2] dt-bindings: nand: meson: support for 512B
ECC step size
Hi Arseniy,
AVKrasnov@...rdevices.ru wrote on Wed, 5 Jul 2023 09:54:33 +0300:
> Meson NAND supports both 512B and 1024B ECC step size, so replace
> 'const' for only 1024B step size with enum for both sizes.
>
> Signed-off-by: Arseniy Krasnov <AVKrasnov@...rdevices.ru>
> ---
> Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
> index 3bec8af91bbb..81ca8828731a 100644
> --- a/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
> +++ b/Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml
> @@ -49,7 +49,8 @@ patternProperties:
> const: hw
>
> nand-ecc-step-size:
> - const: 1024
> + enum: [512, 1024]
> + default: 1024
I was actually wrong in my previous review, there is no strong default
here as the existing binding (and code) try to use the closest
parameters required by the NAND chip: we pick the "optimal"
configuration. So if you don't provide any value here, we expect
the strength and step size advertized by the chip to be used. This is a
common default in the raw NAND subsystem.
Please drop the default line, re-integrate the missing R-by tag from
Rob and in a separate patch please mark nand-ecc-step-size and
nand-ecc-strength mandatory if the other is provide. IOW, we expect
either both, or none of them, but not a single one.
>
> nand-ecc-strength:
> enum: [8, 16, 24, 30, 40, 50, 60]
> @@ -93,6 +94,7 @@ examples:
> nand@0 {
> reg = <0>;
> nand-rb = <0>;
> + nand-ecc-step-size = <1024>;
So in the end this line is wrong and once you get the description right
as I mentioned it above, this will fail to pass
`make DT_SCHEMA_FILES=Documentation/devicetree/bindings/mtd/ dt_binidng_check`
Please drop it from the example, don't add the second property here,
it's best to show a clean example where people stop tampering for no
reason with the optimal values.
> };
> };
>
Thanks,
Miquèl
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