linux-kernel - Re: [PATCH v2 1/7] ASoC: mediatek: mt7986: add common header

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Message-ID: <2c1f1a22247ba54600950e4a4b089ec8dacb401c.camel@mediatek.com>
Date:   Wed, 5 Jul 2023 07:58:48 +0000
From:   Maso Huang (黃加竹) 
        <Maso.Huang@...iatek.com>
To:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "robh+dt@...nel.org" <robh+dt@...nel.org>,
        "linux-mediatek@...ts.infradead.org" 
        <linux-mediatek@...ts.infradead.org>,
        Trevor Wu (吳文良) <Trevor.Wu@...iatek.com>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Allen-KH Cheng (程冠勳) 
        <Allen-KH.Cheng@...iatek.com>,
        "broonie@...nel.org" <broonie@...nel.org>,
        "renzhijie2@...wei.com" <renzhijie2@...wei.com>,
        "conor+dt@...nel.org" <conor+dt@...nel.org>,
        "tiwai@...e.com" <tiwai@...e.com>,
        "lgirdwood@...il.com" <lgirdwood@...il.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "krzysztof.kozlowski+dt@...aro.org" 
        <krzysztof.kozlowski+dt@...aro.org>,
        "matthias.bgg@...il.com" <matthias.bgg@...il.com>,
        "perex@...ex.cz" <perex@...ex.cz>,
        Jiaxin Yu (俞家鑫) <Jiaxin.Yu@...iatek.com>,
        "angelogioacchino.delregno@...labora.com" 
        <angelogioacchino.delregno@...labora.com>,
        "alsa-devel@...a-project.org" <alsa-devel@...a-project.org>
Subject: Re: [PATCH v2 1/7] ASoC: mediatek: mt7986: add common header

On Tue, 2023-07-04 at 11:01 +0200, AngeloGioacchino Del Regno wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  Il 26/06/23 04:34, Maso Huang ha scritto:
> > Add header files for register definition and structure.
> > 
> > Signed-off-by: Maso Huang <maso.huang@...iatek.com>
> > ---
> >   sound/soc/mediatek/mt7986/mt7986-afe-common.h |  51 +++++
> >   sound/soc/mediatek/mt7986/mt7986-reg.h        | 206
> ++++++++++++++++++
> >   2 files changed, 257 insertions(+)
> >   create mode 100644 sound/soc/mediatek/mt7986/mt7986-afe-common.h
> >   create mode 100644 sound/soc/mediatek/mt7986/mt7986-reg.h
> > 
> > diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-common.h
> b/sound/soc/mediatek/mt7986/mt7986-afe-common.h
> > new file mode 100644
> > index 000000000000..646e1be4fdce
> > --- /dev/null
> > +++ b/sound/soc/mediatek/mt7986/mt7986-afe-common.h
> > @@ -0,0 +1,51 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * mt7986-afe-common.h  --  MediaTek 7986 audio driver definitions
> > + *
> > + * Copyright (c) 2021 MediaTek Inc.
> > + * Author: Vic Wu <vic.wu@...iatek.com>
> > + *         Maso Huang <maso.huang@...iatek.com>
> > + */
> > +
> > +#ifndef _MT_7986_AFE_COMMON_H_
> > +#define _MT_7986_AFE_COMMON_H_
> > +
> > +#include <sound/soc.h>
> > +#include <linux/clk.h>
> > +#include <linux/list.h>
> > +#include <linux/regmap.h>
> > +#include "../common/mtk-base-afe.h"
> > +
> > +enum {
> > +MT7986_MEMIF_DL1,
> > +MT7986_MEMIF_VUL12,
> > +MT7986_MEMIF_NUM,
> > +MT7986_DAI_ETDM = MT7986_MEMIF_NUM,
> > +MT7986_DAI_NUM,
> > +};
> > +
> > +enum {
> > +MT7986_IRQ_0,
> > +MT7986_IRQ_1,
> > +MT7986_IRQ_2,
> > +MT7986_IRQ_NUM,
> > +};
> > +
> > +struct clk;
> > +
> > +struct mt7986_afe_private {
> > +struct clk_bulk_data *clks;
> > +int num_clks;
> > +
> > +int pm_runtime_bypass_reg_ctl;
> > +
> > +/* dai */
> > +void *dai_priv[MT7986_DAI_NUM];
> > +};
> > +
> > +unsigned int mt7986_afe_rate_transform(struct device *dev,
> > +       unsigned int rate);
> > +
> > +/* dai register */
> > +int mt7986_dai_etdm_register(struct mtk_base_afe *afe);
> > +#endif
> > diff --git a/sound/soc/mediatek/mt7986/mt7986-reg.h
> b/sound/soc/mediatek/mt7986/mt7986-reg.h
> > new file mode 100644
> > index 000000000000..6433cdf3da92
> > --- /dev/null
> > +++ b/sound/soc/mediatek/mt7986/mt7986-reg.h
> > @@ -0,0 +1,206 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
> > +/*
> > + * mt7986-reg.h  --  MediaTek 7986 audio driver reg definition
> > + *
> > + * Copyright (c) 2021 MediaTek Inc.
> > + * Author: Vic Wu <vic.wu@...iatek.com>
> > + *         Maso Huang <maso.huang@...iatek.com>
> > + */
> > +
> > +#ifndef _MT7986_REG_H_
> > +#define _MT7986_REG_H_
> 
> ..snip..
> 
> > +/* ETDM_OUT5_CON4 */
> > +#define OUT_RELATCH(x)                  ((x) << 24)
> > +#define OUT_RELATCH_SFT                 24
> > +#define OUT_RELATCH_MASK                GENMASK(28, 24)
> > +#define OUT_CLK_SRC(x)                  ((x) << 6)
> > +#define OUT_CLK_SRC_SFT                 6
> > +#define OUT_CLK_SRC_MASK                GENMASK(8, 6)
> > +#define OUT_SEL_FS(x)                   ((x) << 0)
> 
> A number shifted by zero bits is equal to itself, so, this statement
> doesn't
> make sense. I understand why you want a OUT_SEL_FS(x) definition
> though, so
> you could do it like:
> 
> #define OUT_SEL_FS(x)(x)
> 
> After which,
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@...labora.com>
> 
> Regards,
> Angelo

Hi Angelo,

Thanks for your review.
I'll fix this in v3 patch.

Best regards,
Maso