linux-kernel - Re: [PATCH v4] riscv: Discard vector state on syscalls

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Message-ID: <CABgGipVO35+CZUioxn2jFD8mFjVup84GRJXGQQ8wx4urjc0Y+Q@mail.gmail.com>
Date:   Wed, 5 Jul 2023 11:50:50 +0800
From:   Andy Chiu <andy.chiu@...ive.com>
To:     Björn Töpel <bjorn@...nel.org>
Cc:     Paul Walmsley <paul.walmsley@...ive.com>,
        Palmer Dabbelt <palmer@...belt.com>,
        Albert Ou <aou@...s.berkeley.edu>,
        linux-riscv@...ts.infradead.org,
        Björn Töpel <bjorn@...osinc.com>,
        linux-kernel@...r.kernel.org, linux@...osinc.com,
        Palmer Dabbelt <palmer@...osinc.com>,
        Rémi Denis-Courmont <remi@...lab.net>,
        Darius Rad <darius@...espec.com>,
        Conor Dooley <conor.dooley@...rochip.com>
Subject: Re: [PATCH v4] riscv: Discard vector state on syscalls

On Thu, Jun 29, 2023 at 10:22 PM Björn Töpel <bjorn@...nel.org> wrote:
>
> From: Björn Töpel <bjorn@...osinc.com>
>
> The RISC-V vector specification states:
>   Executing a system call causes all caller-saved vector registers
>   (v0-v31, vl, vtype) and vstart to become unspecified.
>
> The vector registers are set to all 1s, vill is set (invalid), and the
> vector status is set to Dirty.
>
> That way we can prevent userspace from accidentally relying on the
> stated save.
>
> Rémi pointed out [1] that writing to the registers might be
> superfluous, and setting vill is sufficient.
>
> Link: https://lore.kernel.org/linux-riscv/12784326.9UPPK3MAeB@basile.remlab.net/ # [1]
> Suggested-by: Darius Rad <darius@...espec.com>
> Suggested-by: Palmer Dabbelt <palmer@...osinc.com>
> Suggested-by: Rémi Denis-Courmont <remi@...lab.net>
> Signed-off-by: Björn Töpel <bjorn@...osinc.com>

Thanks,
Reviewed-by: Andy Chiu <andy.chiu@...ive.com>