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Message-ID: <7c9b7191-0f43-3eff-3b35-d33b046d5bd0@leica-geosystems.com>
Date: Wed, 5 Jul 2023 15:59:17 +0000
From: SHUKLA Mamta Ramendra <mamta.shukla@...ca-geosystems.com>
To: Michael Walle <michael@...le.cc>
CC: "tudor.ambarus@...aro.org" <tudor.ambarus@...aro.org>,
"pratyush@...nel.org" <pratyush@...nel.org>,
"miquel.raynal@...tlin.com" <miquel.raynal@...tlin.com>,
"richard@....at" <richard@....at>,
"vigneshr@...com" <vigneshr@...com>,
"linux-mtd@...ts.infradead.org" <linux-mtd@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
GEO-CHHER-bsp-development
<bsp-development.geo@...ca-geosystems.com>
Subject: Re: [PATCH] mtd: micron-st: enable lock/unlock for mt25qu512a
Hello Michael,
On 05.07.23 15:22, Michael Walle wrote:
> This email is not from Hexagon’s Office 365 instance. Please be careful
> while clicking links, opening attachments, or replying to this email.
>
>
> Am 2023-07-05 15:00, schrieb Mamta Shukla:
>> mt25qu512a[1] supports locking/unlocking through BP bits in SR.
>>
>> Tested using mtd-utils- flash_lock/flash_unlock for MT25QU512ABB8E12.
>>
>
>> [1]
>> https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-b/mt25q_qlkt_u_512_abb_0.pdf?rev=b259aadc3bea49ea8210a41c9ad58211
>
> Link: tag please
Added in v2.
>> Signed-off-by: Mamta Shukla <mamta.shukla@...ca-geosystems.com>
>> ---
>> drivers/mtd/spi-nor/micron-st.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/micron-st.c
>> b/drivers/mtd/spi-nor/micron-st.c
>> index 4b919756a205..5d1dc8e0bbba 100644
>> --- a/drivers/mtd/spi-nor/micron-st.c
>> +++ b/drivers/mtd/spi-nor/micron-st.c
>> @@ -218,6 +218,8 @@ static const struct flash_info st_nor_parts[] = {
>> MFR_FLAGS(USE_FSR)
>> },
>> { "mt25ql512a", INFO6(0x20ba20, 0x104400, 64 * 1024, 1024)
>> + FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
>> + SPI_NOR_BP3_SR_BIT6)
>
> With the changes above:
>
> Reviewed-by: Michael Walle <michael@...le.cc>
>
> Unrelated to this patch, but could you please dump the SFDP tables,
> see [1].
Apologies for the confusion. This patch was only intended for mt25qu512a
chip. Modified in v2.
Here is enumeration log and SFDP table:
[ 214.275995] ACPI: Host-directed Dynamic ACPI Table Load:
[ 214.281387] ACPI: SSDT 0xFFFF8EFBC5A2C300 0000EC (v02 ALASKA MT25QU
00001000 INTL 20190509)
[ 315.452108] spi-nor spi-PRP0001:00: mt25qu512a (65536 Kbytes)
xxd -p /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/sfdp
53464450060101ff00060110300000ff84000102800000ffffffffffffff
ffffffffffffffffffffffffffffffffffffe520fbffffffff1f29eb276b
273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e
03e1ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff
ffffffffffffffffffe7ffff21dcffff
cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/jedec_id
20bb20104400
cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/manufacturer
st
cat /sys/bus/spi/devices/spi-PRP0001:00/spi-nor/partname
mt25qu512a
> FWIW, I noticed the difference between MT25QU and MT25QL here. But
> I don't think we can do anything about it. It is just another example,
> that the name is mostly irrelavant/cannot be trusted. Vendors tend to
> reuse the id for different (software compatible probably) parts. Maybe
> we can get rid of it entirely. Tudor, Pratyush?
>
> -michael
>
> [1]
> https://lore.kernel.org/all/4304e19f3399a0a6e856119d01ccabe0@walle.cc/
Thanks,
Mamta
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