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Message-ID: <20230705172759.1610753-4-gatien.chevallier@foss.st.com>
Date: Wed, 5 Jul 2023 19:27:52 +0200
From: Gatien Chevallier <gatien.chevallier@...s.st.com>
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CC: <linux-crypto@...r.kernel.org>, <devicetree@...r.kernel.org>,
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Gatien Chevallier <gatien.chevallier@...s.st.com>
Subject: [PATCH 03/10] dt-bindings: bus: add device tree bindings for ETZPC
Document ETZPC (Extended TrustZone protection controller). ETZPC is a
firewall controller.
Signed-off-by: Gatien Chevallier <gatien.chevallier@...s.st.com>
---
.../bindings/bus/st,stm32-etzpc.yaml | 90 +++++++++++++++++++
1 file changed, 90 insertions(+)
create mode 100644 Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml
diff --git a/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml b/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml
new file mode 100644
index 000000000000..327fb0b84c0b
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/st,stm32-etzpc.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STM32 Extended TrustZone protection controller bindings
+
+description: |
+ The ETZPC configures TrustZone security in a SoC having bus masters and
+ devices with programmable-security attributes (securable resources).
+
+maintainers:
+ - Gatien Chevallier <gatien.chevallier@...s.st.com>
+
+properties:
+ compatible:
+ const: "st,stm32-etzpc"
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ feature-domain-controller: true
+
+patternProperties:
+ "^.*@[0-9a-f]+$":
+ description: Peripherals
+ type: object
+ properties:
+ feature-domains:
+ minItems: 1
+ maxItems: 2
+ description:
+ The first argument must always be a phandle that references to the
+ firewall controller of the peripheral. The second can contain the
+ platform specific firewall ID of the peripheral.
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+ - feature-domain-controller
+ - "#feature-domain-cells"
+ - ranges
+
+additionalProperties: false
+
+examples:
+ - |
+ // In this example, the usart2 device refers to rifsc as its domain
+ // controller.
+ // Access rights are verified before creating devices.
+
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/stm32mp13-clks.h>
+ #include <dt-bindings/reset/stm32mp13-resets.h>
+
+ etzpc: etzpc@...07000 {
+ compatible = "st,stm32mp13-sys-bus";
+ reg = <0x5c007000 0x400>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ feature-domain-controller;
+ #feature-domain-cells = <1>;
+
+ usart2: serial@...01000 {
+ compatible = "st,stm32h7-uart";
+ reg = <0x4c001000 0x400>;
+ interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc USART2_K>;
+ resets = <&rcc USART2_R>;
+ wakeup-source;
+ dmas = <&dmamux1 43 0x400 0x5>,
+ <&dmamux1 44 0x400 0x1>;
+ dma-names = "rx", "tx";
+ feature-domains = <&etzpc 17>;
+ status = "disabled";
+ };
+ };
--
2.25.1
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