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Message-ID: <CAMRc=Mc6vWmvD3=Z8-eBWT5a4BF2_OoYLvOT4TwH+TAxsY17-w@mail.gmail.com>
Date: Mon, 10 Jul 2023 11:40:08 +0200
From: Bartosz Golaszewski <brgl@...ev.pl>
To: Samuel Holland <samuel.holland@...ive.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Andy Shevchenko <andy@...nel.org>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH] gpio: sifive: Support IRQ wake
On Mon, Jun 26, 2023 at 7:26 PM Samuel Holland
<samuel.holland@...ive.com> wrote:
>
> Each pin drives a separate interrupt in the parent IRQ domain, so there
> is no need to set IRQCHIP_MASK_ON_SUSPEND.
>
> Signed-off-by: Samuel Holland <samuel.holland@...ive.com>
> ---
>
> drivers/gpio/gpio-sifive.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpio/gpio-sifive.c b/drivers/gpio/gpio-sifive.c
> index 98939cd4a71e..c2653313f3a2 100644
> --- a/drivers/gpio/gpio-sifive.c
> +++ b/drivers/gpio/gpio-sifive.c
> @@ -150,6 +150,7 @@ static const struct irq_chip sifive_gpio_irqchip = {
> .irq_disable = sifive_gpio_irq_disable,
> .irq_eoi = sifive_gpio_irq_eoi,
> .irq_set_affinity = sifive_gpio_irq_set_affinity,
> + .irq_set_wake = irq_chip_set_wake_parent,
> .flags = IRQCHIP_IMMUTABLE,
> GPIOCHIP_IRQ_RESOURCE_HELPERS,
> };
> --
> 2.40.1
>
Applied, thanks!
Bart
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