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Message-Id: <20230711-topic-sm638250_bwmon-v1-4-bd4bb96b0673@linaro.org>
Date: Tue, 11 Jul 2023 16:35:16 +0200
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
Georgi Djakov <djakov@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: Marijn Suijten <marijn.suijten@...ainline.org>,
linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@...aro.org>
Subject: [PATCH 4/4] arm64: dts: qcom: sm6350: Add BWMONs
Add the CPU and LLC BWMONs (skip the NPU ones for now) on sm6350.
There are 3 more NPU BWMONs, but these are skipped for now.
Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
arch/arm64/boot/dts/qcom/sm6350.dtsi | 97 ++++++++++++++++++++++++++++++++++++
1 file changed, 97 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index c2b5d56ba242..8f66306d1de3 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1723,6 +1723,103 @@ npu_noc: interconnect@...0000 {
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ pmu@...6300 {
+ compatible = "qcom,sm6350-llcc-bwmon", "qcom,sdm845-bwmon";
+ reg = <0x0 0x090b6300 0x0 0x600>;
+ interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
+
+ operating-points-v2 = <&llcc_bwmon_opp_table>;
+ interconnects = <&clk_virt MASTER_LLCC QCOM_ICC_TAG_ACTIVE_ONLY
+ &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+ llcc_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-0 {
+ opp-peak-kBps = <2288000>;
+ };
+
+ opp-1 {
+ opp-peak-kBps = <4577000>;
+ };
+
+ opp-2 {
+ opp-peak-kBps = <7110000>;
+ };
+
+ opp-3 {
+ opp-peak-kBps = <9155000>;
+ };
+
+ opp-4 {
+ opp-peak-kBps = <12298000>;
+ };
+
+ opp-5 {
+ opp-peak-kBps = <14236000>;
+ };
+
+ };
+ };
+
+ pmu@...d000 {
+ compatible = "qcom,sm6350-cpu-bwmon", "qcom,sc7280-llcc-bwmon";
+ reg = <0x0 0x090cd000 0x0 0x1000>;
+ interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+
+ operating-points-v2 = <&cpu_bwmon_opp_table>;
+ interconnects = <&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
+ &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ACTIVE_ONLY>;
+
+ cpu_bwmon_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-0 {
+ opp-peak-kBps = <762000>;
+ };
+
+ opp-1 {
+ opp-peak-kBps = <1144000>;
+ };
+
+ opp-2 {
+ opp-peak-kBps = <1720000>;
+ };
+
+ opp-3 {
+ opp-peak-kBps = <2086000>;
+ };
+
+ opp-4 {
+ opp-peak-kBps = <2597000>;
+ };
+
+ opp-5 {
+ opp-peak-kBps = <2929000>;
+ };
+
+ opp-6 {
+ opp-peak-kBps = <3879000>;
+ };
+
+ opp-7 {
+ opp-peak-kBps = <5161000>;
+ };
+
+ opp-8 {
+ opp-peak-kBps = <5931000>;
+ };
+
+ opp-9 {
+ opp-peak-kBps = <6881000>;
+ };
+
+ opp-10 {
+ opp-peak-kBps = <7980000>;
+ };
+ };
+ };
+
usb_1: usb@...8800 {
compatible = "qcom,sm6350-dwc3", "qcom,dwc3";
reg = <0 0x0a6f8800 0 0x400>;
--
2.41.0
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