linux-kernel - Re: [PATCH] ARM: dts: stm32: re-add CAN support on stm32f746

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <eb735953-bfa3-4dd7-6ab0-184de050c7de@foss.st.com>
Date:   Tue, 11 Jul 2023 11:54:47 +0200
From:   Alexandre TORGUE <alexandre.torgue@...s.st.com>
To:     Dario Binacchi <dario.binacchi@...rulasolutions.com>,
        <linux-kernel@...r.kernel.org>
CC:     Conor Dooley <conor+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Rob Herring <robh+dt@...nel.org>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-stm32@...md-mailman.stormreply.com>
Subject: Re: [PATCH] ARM: dts: stm32: re-add CAN support on stm32f746

Hi Dario

On 7/4/23 19:33, Dario Binacchi wrote:
> The revert commit 36a6418bb1259 ("Revert "ARM: dts: stm32: add CAN support
> on stm32f746"") prevented parsing errors due to the lack of CAN3 binding.
> 
> Now that the binding definition for CAN3 is available in the mainline
> thanks to commit 8f3ef556f8e1a ("dt-bindings: mfd: stm32f7: Add binding
> definition for CAN3"), we can re-add the CAN support and make the driver
> usable again.
> 
> Signed-off-by: Dario Binacchi <dario.binacchi@...rulasolutions.com>
> ---
> 

...

> +		};
> +
> +		can2: can@...06800 {
> +			compatible = "st,stm32f4-bxcan";
> +			reg = <0x40006800 0x200>;
> +			iterrupts = <63>, <64>, <65>, <66>;

I modified this (bad) line and applied the patch on stm32-next.

br
Alex


> +			interrupt-names = "tx", "rx0", "rx1", "sce";
> +			resets = <&rcc STM32F7_APB1_RESET(CAN2)>;
> +			clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN2)>;
> +			st,can-secondary;
> +			st,gcan = <&gcan1>;
> +			status = "disabled";
> +		};
> +
>   		cec: cec@...06c00 {
>   			compatible = "st,stm32-cec";
>   			reg = <0x40006C00 0x400>;