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Message-ID: <tvm772o6uqndgyjvycv27qouqq76crpre5tyqcnanaautqjjwn@pydiwhjzhbgd>
Date: Tue, 11 Jul 2023 15:30:19 +0300
From: Serge Semin <fancer.lancer@...il.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: Mark Brown <broonie@...nel.org>,
Cristian Ciocaltea <cristian.ciocaltea@...labora.com>,
Yang Yingliang <yangyingliang@...wei.com>,
Amit Kumar Mahapatra via Alsa-devel
<alsa-devel@...a-project.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Tharun Kumar P <tharunkumar.pasumarthi@...rochip.com>,
Vijaya Krishna Nivarthi <quic_vnivarth@...cinc.com>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-arm-msm@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
linux-riscv@...ts.infradead.org,
linux-stm32@...md-mailman.stormreply.com,
linux-trace-kernel@...r.kernel.org, netdev@...r.kernel.org,
Sanjay R Mehta <sanju.mehta@....com>,
Radu Pirea <radu_nicolae.pirea@....ro>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
Claudiu Beznea <claudiu.beznea@...rochip.com>,
Tudor Ambarus <tudor.ambarus@...aro.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Palmer Dabbelt <palmer@...belt.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Orson Zhai <orsonzhai@...il.com>,
Baolin Wang <baolin.wang@...ux.alibaba.com>,
Chunyan Zhang <zhang.lyra@...il.com>,
Alain Volmat <alain.volmat@...s.st.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Max Filippov <jcmvbkbc@...il.com>,
Steven Rostedt <rostedt@...dmis.org>,
Masami Hiramatsu <mhiramat@...nel.org>,
Richard Cochran <richardcochran@...il.com>
Subject: Re: [PATCH v2 13/15] spi: Rename SPI_MASTER_GPIO_SS to
SPI_CONTROLLER_GPIO_SS
On Mon, Jul 10, 2023 at 06:49:30PM +0300, Andy Shevchenko wrote:
> Rename SPI_MASTER_GPIO_SS to SPI_CONTROLLER_GPIO_SS and
> convert the users to SPI_CONTROLLER_GPIO_SS to follow
* I'm not an expert in English, but imo the next would look a
* bit more readable:
* convert s/the users to SPI_CONTROLLER_GPIO_SS/the code to using SPI_CONTROLLER_GPIO_SS
> the new naming shema.
s/shema/schema
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
[...]
> drivers/spi/spi-dw-core.c | 2 +-
[...]
> diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
> index a8ba41ad4541..45f5acc26b1d 100644
> --- a/drivers/spi/spi-dw-core.c
> +++ b/drivers/spi/spi-dw-core.c
> @@ -932,7 +932,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
> if (dws->mem_ops.exec_op)
> master->mem_ops = &dws->mem_ops;
> master->max_speed_hz = dws->max_freq;
> - master->flags = SPI_MASTER_GPIO_SS;
> + master->flags = SPI_CONTROLLER_GPIO_SS;
> master->auto_runtime_pm = true;
>
> /* Get default rx sample delay */
For the DW APB/AHB SSI driver:
Reviewed-by: Serge Semin <fancer.lancer@...il.com>
-Serge(y)
[...]
> diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
> index 06a92a3a5746..bcabae98cb7c 100644
> --- a/drivers/spi/spi.c
> +++ b/drivers/spi/spi.c
> @@ -995,7 +995,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
> gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), activate);
> }
> /* Some SPI masters need both GPIO CS & slave_select */
> - if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
> + if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) &&
> spi->controller->set_cs)
> spi->controller->set_cs(spi, !enable);
> } else if (spi->controller->set_cs) {
> @@ -3020,7 +3020,7 @@ static int spi_get_gpio_descs(struct spi_controller *ctlr)
>
> ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
>
> - if ((ctlr->flags & SPI_MASTER_GPIO_SS) && num_cs_gpios &&
> + if ((ctlr->flags & SPI_CONTROLLER_GPIO_SS) && num_cs_gpios &&
> ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
> dev_err(dev, "No unused native chip select available\n");
> return -EINVAL;
> diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
> index cdc3addfe117..43f6c3f71a76 100644
> --- a/include/linux/spi/spi.h
> +++ b/include/linux/spi/spi.h
> @@ -578,8 +578,7 @@ struct spi_controller {
> #define SPI_CONTROLLER_NO_TX BIT(2) /* Can't do buffer write */
> #define SPI_CONTROLLER_MUST_RX BIT(3) /* Requires rx */
> #define SPI_CONTROLLER_MUST_TX BIT(4) /* Requires tx */
> -
> -#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
> +#define SPI_CONTROLLER_GPIO_SS BIT(5) /* GPIO CS must select slave */
>
> /* Flag indicating if the allocation of this struct is devres-managed */
> bool devm_allocated;
> --
> 2.40.0.1.gaa8946217a0b
>
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