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Message-ID: <ZLAqBzZTvylHn2Yp@smile.fi.intel.com>
Date:   Thu, 13 Jul 2023 19:44:55 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Cc:     hdegoede@...hat.com, markgross@...nel.org,
        ilpo.jarvinen@...ux.intel.com, platform-driver-x86@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/3] platform/x86/intel/tpmi: Read feature control
 status

On Wed, Jul 12, 2023 at 03:59:48PM -0700, Srinivas Pandruvada wrote:
> Some of the PM features can be locked or disabled. In that case, write
> interface can be locked.
> 
> This status is read via a mailbox. There is one TPMI ID which provides
> base address for interface and data register for mail box operation.
> The mailbox operations is defined in the TPMI specification. Refer to
> https://github.com/intel/tpmi_power_management/ for TPMI specifications.
> 
> An API is exposed to feature drivers to read feature control status.

...


> +#define TPMI_CONTROL_TIMEOUT_MAX_US	(1 * USEC_PER_SEC)


> +#define TPMI_RB_TIMEOUT_MAX_US		USEC_PER_SEC

In the similar way?

-- 
With Best Regards,
Andy Shevchenko


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