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Message-ID: <20230713164808.24m46mdwnh6h2dy5@unwed>
Date: Thu, 13 Jul 2023 11:48:08 -0500
From: Nishanth Menon <nm@...com>
To: Sinthu Raja <sinthu.raja@...tralsolutions.com>
CC: Tero Kristo <kristo@...nel.org>, Rob Herring <robh+dt@...nel.org>,
Vignesh Raghavendra <vigneshr@...com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
<linux-arm-kernel@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Sinthu Raja <sinthu.raja@...com>
Subject: Re: [PATCH] arm64: dts: ti: k3-j721s2-main: Add dts nodes for EHRPWMs
On 17:10-20230713, Sinthu Raja wrote:
> From: Sinthu Raja <sinthu.raja@...com>
>
> Add dts nodes for 6 EHRPWM instances on SoC. Disable EHRPWM nodes in the
> dtsi files and only enable the ones that are actually pinned out on a
> given board in the board dts file.
>
> Signed-off-by: Sinthu Raja <sinthu.raja@...com>
> ---
> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 66 ++++++++++++++++++++++
> 1 file changed, 66 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index ed79ab3a3271..0d3a965f764f 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -58,6 +58,72 @@ serdes_ln_ctrl: mux-controller@80 {
> mux-reg-masks = <0x80 0x3>, <0x84 0x3>, /* SERDES0 lane0/1 select */
> <0x88 0x3>, <0x8c 0x3>; /* SERDES0 lane2/3 select */
> };
> +
> + ehrpwm_tbclk: clock-controller@140 {
> + compatible = "ti,am654-ehrpwm-tbclk", "syscon";
NAK - Please run dtbs_check prior to posting.
See Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml
> + reg = <0x140 0x18>;
> + #clock-cells = <1>;
> + };
> + };
> +
> + main_ehrpwm0: pwm@...0000 {
> + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> + #pwm-cells = <3>;
> + reg = <0x00 0x3000000 0x00 0x100>;
> + power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&ehrpwm_tbclk 0>, <&k3_clks 160 0>;
> + clock-names = "tbclk", "fck";
> + status = "disabled";
> + };
> +
> + main_ehrpwm1: pwm@...0000 {
> + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> + #pwm-cells = <3>;
> + reg = <0x00 0x3010000 0x00 0x100>;
> + power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&ehrpwm_tbclk 1>, <&k3_clks 161 0>;
> + clock-names = "tbclk", "fck";
> + status = "disabled";
> + };
> +
> + main_ehrpwm2: pwm@...0000 {
> + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> + #pwm-cells = <3>;
> + reg = <0x00 0x3020000 0x00 0x100>;
> + power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&ehrpwm_tbclk 2>, <&k3_clks 162 0>;
> + clock-names = "tbclk", "fck";
> + status = "disabled";
> + };
> +
> + main_ehrpwm3: pwm@...0000 {
> + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> + #pwm-cells = <3>;
> + reg = <0x00 0x3030000 0x00 0x100>;
> + power-domains = <&k3_pds 163 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&ehrpwm_tbclk 3>, <&k3_clks 163 0>;
> + clock-names = "tbclk", "fck";
> + status = "disabled";
> + };
> +
> + main_ehrpwm4: pwm@...0000 {
> + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> + #pwm-cells = <3>;
> + reg = <0x00 0x3040000 0x00 0x100>;
> + power-domains = <&k3_pds 164 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&ehrpwm_tbclk 4>, <&k3_clks 164 0>;
> + clock-names = "tbclk", "fck";
> + status = "disabled";
> + };
> +
> + main_ehrpwm5: pwm@...0000 {
> + compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
> + #pwm-cells = <3>;
> + reg = <0x00 0x3050000 0x00 0x100>;
> + power-domains = <&k3_pds 165 TI_SCI_PD_EXCLUSIVE>;
> + clocks = <&ehrpwm_tbclk 5>, <&k3_clks 165 0>;
> + clock-names = "tbclk", "fck";
> + status = "disabled";
> };
>
> gic500: interrupt-controller@...0000 {
> --
> 2.36.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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