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Message-ID: <c64f5cb7-4750-512d-f105-dff6ec03de12@amd.com>
Date:   Wed, 12 Jul 2023 17:51:42 -0700
From:   Lizhi Hou <lizhi.hou@....com>
To:     Randy Dunlap <rdunlap@...radead.org>, <vkoul@...nel.org>,
        <dmaengine@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC:     Nishad Saraf <nishads@....com>, <max.zhen@....com>,
        <sonal.santan@....com>
Subject: Re: [RESEND PATCH V2 QDMA 1/1] dmaengine: amd: qdma: Add AMD QDMA
 driver


On 7/12/23 14:19, Randy Dunlap wrote:
> Hi--
>
> On 7/12/23 09:25, Lizhi Hou wrote:
>> diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
>> index 644c188d6a11..89b26e68988a 100644
>> --- a/drivers/dma/Kconfig
>> +++ b/drivers/dma/Kconfig
>> @@ -85,6 +85,19 @@ config AMCC_PPC440SPE_ADMA
>>   	help
>>   	  Enable support for the AMCC PPC440SPe RAID engines.
>>   
>> +config AMD_QDMA
>> +	tristate "AMD Queue-based DMA"
>> +	depends on HAS_IOMEM
>> +	select DMA_ENGINE
>> +	select DMA_VIRTUAL_CHANNELS
>> +	select REGMAP_MMIO
>> +	help
>> +	  Enable support for the AMD Queue-based DMA subsystem.The primary
> Need a space...                                  DMA subsystem. The primary

Oh, ok. I will fix it.


Thanks,

Lizhi

>
>> +	  mechanism to transfer data using the QDMA is for the QDMA engine to
>> +	  operate on instructions (descriptors) provided by the host operating
>> +	  system. Using the descriptors, the QDMA can move data in both the Host
>> +	  to Card (H2C) direction, or the Card to Host (C2H) direction.

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