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Message-ID: <20230713073003.GE2199@sol.localdomain>
Date: Thu, 13 Jul 2023 00:30:03 -0700
From: Eric Biggers <ebiggers@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: vireshk@...nel.org, nm@...com, sboyd@...nel.org,
myungjoo.ham@...sung.com, kyungmin.park@...sung.com,
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krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
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Subject: Re: [PATCH 04/14] arm64: dts: qcom: sdm845: Fix the min frequency of
"ice_core_clk"
On Wed, Jul 12, 2023 at 04:01:59PM +0530, Manivannan Sadhasivam wrote:
> Minimum frequency of the "ice_core_clk" should be 75MHz as specified in the
> downstream vendor devicetree. So fix it!
>
> https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LA.UM.7.3.r1-09300-sdm845.0/arch/arm64/boot/dts/qcom/sdm845.dtsi
>
> Fixes: cc16687fbd74 ("arm64: dts: qcom: sdm845: add UFS controller")
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 9ed74bf72d05..89520a9fe1e3 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2614,7 +2614,7 @@ ufs_mem_hc: ufshc@...4000 {
> <0 0>,
> <0 0>,
> <0 0>,
> - <0 300000000>;
> + <75000000 300000000>;
Thanks for fixing this! What was the visible effect of this bug, if any?
Do you know why the minimum has that particular value?
The Fixes tag is wrong; it should be:
Fixes: 433f9a57298f ("arm64: dts: sdm845: add Inline Crypto Engine registers and clock")
- Eric
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