lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <BN9PR11MB5276C14341AC7CE6D352948F8C37A@BN9PR11MB5276.namprd11.prod.outlook.com>
Date:   Thu, 13 Jul 2023 07:56:31 +0000
From:   "Tian, Kevin" <kevin.tian@...el.com>
To:     Jacob Pan <jacob.jun.pan@...ux.intel.com>,
        LKML <linux-kernel@...r.kernel.org>,
        "iommu@...ts.linux.dev" <iommu@...ts.linux.dev>,
        Lu Baolu <baolu.lu@...ux.intel.com>,
        Joerg Roedel <joro@...tes.org>,
        Jean-Philippe Brucker <jean-philippe@...aro.com>,
        "Robin Murphy" <robin.murphy@....com>
CC:     Jason Gunthorpe <jgg@...dia.com>, Will Deacon <will@...nel.org>,
        "Liu, Yi L" <yi.l.liu@...el.com>,
        "Yu, Fenghua" <fenghua.yu@...el.com>,
        "Luck, Tony" <tony.luck@...el.com>
Subject: RE: [PATCH v10 6/7] iommu/vt-d: Add set_dev_pasid callback for dma
 domain

> From: Jacob Pan <jacob.jun.pan@...ux.intel.com>
> Sent: Thursday, July 13, 2023 12:34 AM
> 
> 
> -	/*
> -	 * Should never reach here until we add support for attaching
> -	 * non-SVA domain to a pasid.
> -	 */
> -	WARN_ON(1);
> +	dmar_domain = to_dmar_domain(domain);
> +	spin_lock_irqsave(&dmar_domain->lock, flags);
> +	list_for_each_entry(curr, &dmar_domain->dev_pasids, link_domain)
> {
> +		if (curr->dev == dev && curr->pasid == pasid) {
> +			list_del(&curr->link_domain);
> +			dev_pasid = curr;
> +			break;
> +		}
> +	}
> +	spin_unlock_irqrestore(&dmar_domain->lock, flags);
> 

what about no matching dev_pasid is find?

> +	domain_detach_iommu(dmar_domain, iommu);
> +	kfree(dev_pasid);
>  out_tear_down:
>  	intel_pasid_tear_down_entry(iommu, dev, pasid, false);
>  	intel_drain_pasid_prq(dev, pasid);
>  }
> 
> +static int intel_iommu_set_dev_pasid(struct iommu_domain *domain,
> +				     struct device *dev, ioasid_t pasid)
> +{
> +	struct device_domain_info *info = dev_iommu_priv_get(dev);
> +	struct dmar_domain *dmar_domain = to_dmar_domain(domain);
> +	struct intel_iommu *iommu = info->iommu;
> +	struct dev_pasid_info *dev_pasid;
> +	unsigned long flags;
> +	int ret;
> +
> +	if (!pasid_supported(iommu) || dev_is_real_dma_subdevice(dev))
> +		return -EOPNOTSUPP;
> +
> +	if (context_copied(iommu, info->bus, info->devfn))
> +		return -EBUSY;
> +
> +	ret = prepare_domain_attach_device(domain, dev);
> +	if (ret)
> +		return ret;
> +
> +	dev_pasid = kzalloc(sizeof(*dev_pasid), GFP_KERNEL);
> +	if (!dev_pasid)
> +		return -ENOMEM;
> +
> +	ret = domain_attach_iommu(dmar_domain, iommu);
> +	if (ret)
> +		goto out_free;
> +
> +	if (domain_type_is_si(dmar_domain))
> +		ret = intel_pasid_setup_pass_through(iommu, dmar_domain,
> +						     dev, pasid);
> +	else if (dmar_domain->use_first_level)
> +		ret = domain_setup_first_level(iommu, dmar_domain,
> +					       dev, pasid);
> +	else
> +		ret = intel_pasid_setup_second_level(iommu, dmar_domain,
> +						     dev, pasid);
> +	if (ret)
> +		goto out_detach_iommu;
> +
> +	dev_pasid->dev = dev;
> +	dev_pasid->pasid = pasid;
> +	spin_lock_irqsave(&dmar_domain->lock, flags);
> +	list_add(&dev_pasid->link_domain, &dmar_domain->dev_pasids);
> +	spin_unlock_irqrestore(&dmar_domain->lock, flags);
> +
> +	return 0;
> +out_detach_iommu:
> +	domain_detach_iommu(dmar_domain, iommu);
> +out_free:
> +	kfree(dev_pasid);
> +	return ret;
> +}
> +
>  const struct iommu_ops intel_iommu_ops = {
>  	.capable		= intel_iommu_capable,
>  	.domain_alloc		= intel_iommu_domain_alloc,
> @@ -4777,6 +4869,7 @@ const struct iommu_ops intel_iommu_ops = {
>  #endif
>  	.default_domain_ops = &(const struct iommu_domain_ops) {
>  		.attach_dev		= intel_iommu_attach_device,
> +		.set_dev_pasid		= intel_iommu_set_dev_pasid,
>  		.map_pages		= intel_iommu_map_pages,
>  		.unmap_pages		= intel_iommu_unmap_pages,
>  		.iotlb_sync_map		=
> intel_iommu_iotlb_sync_map,
> diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h
> index 6d94a29f5d52..68bb7cdf5543 100644
> --- a/drivers/iommu/intel/iommu.h
> +++ b/drivers/iommu/intel/iommu.h
> @@ -595,6 +595,7 @@ struct dmar_domain {
> 
>  	spinlock_t lock;		/* Protect device tracking lists */
>  	struct list_head devices;	/* all devices' list */
> +	struct list_head dev_pasids;	/* all attached pasids */
> 
>  	struct dma_pte	*pgd;		/* virtual address */
>  	int		gaw;		/* max guest address width */
> @@ -717,6 +718,12 @@ struct device_domain_info {
>  	struct pasid_table *pasid_table; /* pasid table */
>  };
> 
> +struct dev_pasid_info {
> +	struct list_head link_domain;	/* link to domain siblings */
> +	struct device *dev;		/* the physical device */
> +	ioasid_t pasid;			/* PASID of the physical device */
> +};

the comment for dev/pasid is meaningless.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ