linux-kernel - Re: [PATCH 07/10] x86/tdx: Extend TDX_MODULE_CALL to support more TDCALL/SEAMCALL leafs

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Message-ID: <cc5b4df23273b546225241fae2cbbea52ccb13d3.camel@intel.com>
Date:   Thu, 13 Jul 2023 08:02:54 +0000
From:   "Huang, Kai" <kai.huang@...el.com>
To:     "peterz@...radead.org" <peterz@...radead.org>
CC:     "Hansen, Dave" <dave.hansen@...el.com>,
        "Christopherson,, Sean" <seanjc@...gle.com>,
        "bp@...en8.de" <bp@...en8.de>, "x86@...nel.org" <x86@...nel.org>,
        "hpa@...or.com" <hpa@...or.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "Yamahata, Isaku" <isaku.yamahata@...el.com>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "sathyanarayanan.kuppuswamy@...ux.intel.com" 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>
Subject: Re: [PATCH 07/10] x86/tdx: Extend TDX_MODULE_CALL to support more
 TDCALL/SEAMCALL leafs

On Wed, 2023-07-12 at 18:59 +0200, Peter Zijlstra wrote:
> On Wed, Jul 12, 2023 at 06:53:37PM +0200, Peter Zijlstra wrote:
> > On Wed, Jul 12, 2023 at 08:55:21PM +1200, Kai Huang wrote:
> > 
> > 
> > > @@ -72,7 +142,46 @@
> > >  	movq %r9,  TDX_MODULE_r9(%rsi)
> > >  	movq %r10, TDX_MODULE_r10(%rsi)
> > >  	movq %r11, TDX_MODULE_r11(%rsi)
> > > -	.endif
> > > +	.endif	/* \ret */
> > > +
> > > +	.if \saved
> > > +	.if \ret && \host
> > > +	/*
> > > +	 * Clear registers shared by guest for VP.ENTER to prevent
> > > +	 * speculative use of guest's values, including those are
> > > +	 * restored from the stack.
> > > +	 *
> > > +	 * See arch/x86/kvm/vmx/vmenter.S:
> > > +	 *
> > > +	 * In theory, a L1 cache miss when restoring register from stack
> > > +	 * could lead to speculative execution with guest's values.
> > > +	 *
> > > +	 * Note: RBP/RSP are not used as shared register.  RSI has been
> > > +	 * restored already.
> > > +	 *
> > > +	 * XOR is cheap, thus unconditionally do for all leafs.
> > > +	 */
> > > +	xorq %rcx, %rcx
> > > +	xorq %rdx, %rdx
> > > +	xorq %r8,  %r8
> > > +	xorq %r9,  %r9
> > > +	xorq %r10, %r10
> > > +	xorq %r11, %r11
> > 
> > > +	xorq %r12, %r12
> > > +	xorq %r13, %r13
> > > +	xorq %r14, %r14
> > > +	xorq %r15, %r15
> > > +	xorq %rbx, %rbx
> > 
> > ^ those are an instant pop below, seems daft to clear them.
> 
> Also, please use the 32bit variant:
> 
> 	xorl	%ecx, %ecx
> 
> saves a RAX prefix each.

Sorry I am ignorant here.  Won't "clearing ECX only" leave high bits of
registers still containing guest's value?

I see KVM code uses:

        xor %eax, %eax
        xor %ecx, %ecx
        xor %edx, %edx
        xor %ebp, %ebp
        xor %esi, %esi
        xor %edi, %edi
#ifdef CONFIG_X86_64
        xor %r8d,  %r8d
        xor %r9d,  %r9d
        xor %r10d, %r10d
        xor %r11d, %r11d
        xor %r12d, %r12d
        xor %r13d, %r13d
        xor %r14d, %r14d
        xor %r15d, %r15d
#endif

Which makes sense because KVM wants to support 32-bit too.

However for TDX is 64-bit only.

And I also see the current TDVMCALL code has:

        xor %r8d,  %r8d
        xor %r9d,  %r9d
        xor %r10d, %r10d                                                       
        xor %r11d, %r11d                                                       
        xor %rdi,  %rdi                                                        
        xor %rdx,  %rdx

Why does it need to use "d" postfix for all r* registers?

Sorry for those questions but I struggled when I wrote those assembly and am
hoping to get my mind cleared on this. :-)

Thanks!