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Message-ID: <0e75c874-1d3b-7ccb-b201-2387e09e8516@vaisala.com>
Date:   Thu, 13 Jul 2023 12:07:16 +0300
From:   Vesa Jääskeläinen 
        <vesa.jaaskelainen@...sala.com>
To:     Ahmad Fatoum <a.fatoum@...gutronix.de>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     devicetree@...r.kernel.org, Conor Dooley <conor+dt@...nel.org>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <festevam@...il.com>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Russell King <linux@...linux.org.uk>,
        Rob Herring <robh+dt@...nel.org>, linux-kernel@...r.kernel.org,
        Eric Dumazet <edumazet@...gle.com>,
        Shenwei Wang <shenwei.wang@....com>,
        Clark Wang <xiaoning.wang@....com>,
        NXP Linux Team <linux-imx@....com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Jakub Kicinski <kuba@...nel.org>, Wei Fang <wei.fang@....com>,
        netdev@...r.kernel.org, Paolo Abeni <pabeni@...hat.com>,
        Shawn Guo <shawnguo@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/2] dt-bindings: net: fsl,fec: Add TX clock controls

Hi Ahmad,

On 13.7.2023 11.47, Ahmad Fatoum wrote:
> Hello Vesa,
>
> On 13.07.23 10:29, Vesa Jääskeläinen wrote:
>> Hi Krzysztof,
>>
>> On 12.7.2023 23.36, Krzysztof Kozlowski wrote:
>>> On 11/07/2023 17:08, Vesa Jääskeläinen wrote:
>>>> With fsl,fec-tx-clock-output one can control if TX clock is routed outside
>>>> of the chip.
>>>>
>>>> With fsl,fec-tx-clk-as-ref-clock one can select if external TX clock is as
>>>> reference clock.
>>>>
>>>> Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@...sala.com>
>>>> ---
>>>>    .../devicetree/bindings/net/fsl,fec.yaml          | 15 +++++++++++++++
>>>>    1 file changed, 15 insertions(+)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/net/fsl,fec.yaml b/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>>> index b494e009326e..c09105878bc6 100644
>>>> --- a/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>>> +++ b/Documentation/devicetree/bindings/net/fsl,fec.yaml
>>>> @@ -166,6 +166,21 @@ properties:
>>>>        description:
>>>>          If present, indicates that the hardware supports waking up via magic packet.
>>>>    +  fsl,fec-tx-clock-output:
>>>> +    $ref: /schemas/types.yaml#/definitions/flag
>>>> +    description:
>>>> +      If present, ENETx_TX_CLK output driver is enabled.
>>>> +      If not present, ENETx_TX_CLK output driver is disabled.
>>> Here...
>>>
>>>> +
>>>> +  fsl,fec-tx-clk-as-ref-clock:
>>>> +    $ref: /schemas/types.yaml#/definitions/flag
>>>> +    description:
>>>> +      If present, gets ENETx TX reference clk from the ENETx_TX_CLK pin. In
>>>> +      this use case, an external OSC provides the clock for both the external
>>>> +      PHY and the internal controller.
>>>> +      If not present, ENETx TX reference clock is driven by ref_enetpllx. This
>>>> +      clock is also output to pins via the IOMUX.ENET_REF_CLKx function.
>>> and here:
>>> In general, Common Clock Framework and its bindings should be used for
>>> handling clock providers and consumers. Why it cannot be used for these
>>> two cases?
>> Did you have something specific in mind on how it could be modeled?
>>
>> I tried to look at:
>> Documentation/devicetree/bindings/clock/
>>
>> But didn't spot anything for this.
> This has been implemented for i.MX6Q/DL using CCF. Please follow suit
> for SoloX. See series at:
> https://lore.kernel.org/all/20230131084642.709385-1-o.rempel@pengutronix.de/
>
> Thanks,
> Ahmad

Thanks for the reference. This looks promising.

Let me try it out.

Thanks,
Vesa Jääskeläinen

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