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Message-ID: <20230713094007.GG3138667@hirez.programming.kicks-ass.net>
Date: Thu, 13 Jul 2023 11:40:07 +0200
From: Peter Zijlstra <peterz@...radead.org>
To: "Huang, Kai" <kai.huang@...el.com>
Cc: "Hansen, Dave" <dave.hansen@...el.com>,
"Christopherson,, Sean" <seanjc@...gle.com>,
"bp@...en8.de" <bp@...en8.de>, "x86@...nel.org" <x86@...nel.org>,
"hpa@...or.com" <hpa@...or.com>,
"mingo@...hat.com" <mingo@...hat.com>,
"kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"Yamahata, Isaku" <isaku.yamahata@...el.com>,
"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"sathyanarayanan.kuppuswamy@...ux.intel.com"
<sathyanarayanan.kuppuswamy@...ux.intel.com>
Subject: Re: [PATCH 07/10] x86/tdx: Extend TDX_MODULE_CALL to support more
TDCALL/SEAMCALL leafs
On Thu, Jul 13, 2023 at 09:34:24AM +0000, Huang, Kai wrote:
> On Thu, 2023-07-13 at 10:46 +0200, Peter Zijlstra wrote:
> > On Thu, Jul 13, 2023 at 07:48:20AM +0000, Huang, Kai wrote:
> >
> > > I found below comment in KVM code:
> > >
> > > > + * See arch/x86/kvm/vmx/vmenter.S:
> > > > + *
> > > > + * In theory, a L1 cache miss when restoring register from stack
> > > > + * could lead to speculative execution with guest's values.
> > >
> > > And KVM explicitly does XOR for the registers that gets "pop"ed almost
> > > instantly, so I followed.
> > >
> > > But to be honest I don't quite understand this. :-)
> >
> > Urgh, I suppose that actually makes sense. Since pop is a load it might
> > continue speculation with the previous value. Whereas the xor-clear
> > idiom is impossible to speculate through.
> >
> > Oh well...
>
> Then should I keep those registers that are "pop"ed immediately afterwards?
Yeah, I suppose so.
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