lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5cc5ba09636647a076206fae932bbf88f233b8b2.camel@intel.com>
Date:   Thu, 13 Jul 2023 10:19:49 +0000
From:   "Huang, Kai" <kai.huang@...el.com>
To:     "peterz@...radead.org" <peterz@...radead.org>
CC:     "Hansen, Dave" <dave.hansen@...el.com>,
        "Christopherson,, Sean" <seanjc@...gle.com>,
        "bp@...en8.de" <bp@...en8.de>, "x86@...nel.org" <x86@...nel.org>,
        "hpa@...or.com" <hpa@...or.com>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "kirill.shutemov@...ux.intel.com" <kirill.shutemov@...ux.intel.com>,
        "tglx@...utronix.de" <tglx@...utronix.de>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "pbonzini@...hat.com" <pbonzini@...hat.com>,
        "Yamahata, Isaku" <isaku.yamahata@...el.com>,
        "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
        "sathyanarayanan.kuppuswamy@...ux.intel.com" 
        <sathyanarayanan.kuppuswamy@...ux.intel.com>
Subject: Re: [PATCH 07/10] x86/tdx: Extend TDX_MODULE_CALL to support more
 TDCALL/SEAMCALL leafs

On Thu, 2023-07-13 at 10:43 +0200, Peter Zijlstra wrote:
> On Thu, Jul 13, 2023 at 08:02:54AM +0000, Huang, Kai wrote:
> 
> > Sorry I am ignorant here.  Won't "clearing ECX only" leave high bits of
> > registers still containing guest's value?
> 
> architecture zero-extends 32bit stores

Sorry, where can I find this information? Looking at SDM I couldn't find :-(

> 
> > I see KVM code uses:
> > 
> >         xor %eax, %eax
> >         xor %ecx, %ecx
> >         xor %edx, %edx
> >         xor %ebp, %ebp
> >         xor %esi, %esi
> >         xor %edi, %edi
> > #ifdef CONFIG_X86_64
> >         xor %r8d,  %r8d
> >         xor %r9d,  %r9d
> >         xor %r10d, %r10d
> >         xor %r11d, %r11d
> >         xor %r12d, %r12d
> >         xor %r13d, %r13d
> >         xor %r14d, %r14d
> >         xor %r15d, %r15d
> > #endif
> > 
> > Which makes sense because KVM wants to support 32-bit too.
> 
> Encoding for the first lot is shorter, the 64bit regs obviously need the
> RAX byte anyway.
> 
> > However for TDX is 64-bit only.
> > 
> > And I also see the current TDVMCALL code has:
> > 
> >         xor %r8d,  %r8d
> >         xor %r9d,  %r9d
> >         xor %r10d, %r10d                                                       
> >         xor %r11d, %r11d                                                       
> >         xor %rdi,  %rdi                                                        
> >         xor %rdx,  %rdx
> > 
> > Why does it need to use "d" postfix for all r* registers?
> 
> That's the name of the 32bit subword, r#[bwd] for byte, word,
> double-word. SDM v1 3.7.2.1 has the whole list, I couldn't quicky find
> one for the zero-extention thing
> 
> > Sorry for those questions but I struggled when I wrote those assembly and am
> > hoping to get my mind cleared on this. :-)
> 
> No problem.
> 

I _think_ I understand now? In 64-bit mode

	xor %eax, %eax

equals to

	xor %rax, %rax

(due to "architecture zero-extends 32bit stores")

Thus using the former (plus using "d" for %r*) can save some memory?

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ