[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1689247213-13569-3-git-send-email-quic_krichai@quicinc.com>
Date: Thu, 13 Jul 2023 16:50:12 +0530
From: Krishna chaitanya chundru <quic_krichai@...cinc.com>
To: manivannan.sadhasivam@...aro.org
Cc: helgaas@...nel.org, linux-pci@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
quic_vbadigan@...cinc.com, quic_nitegupt@...cinc.com,
quic_skananth@...cinc.com, quic_ramkri@...cinc.com,
krzysztof.kozlowski@...aro.org,
Krishna chaitanya chundru <quic_krichai@...cinc.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Conor Dooley <conor+dt@...nel.org>,
devicetree@...r.kernel.org (open list:OPEN FIRMWARE AND FLATTENED
DEVICE TREE BINDINGS)
Subject: [PATCH v8 2/3] arm: dts: qcom: sdx65: Add PCIe interconnect path
Add pcie-mem interconnect path to sdx65 platform.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
---
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
index 1a35830..77fa97c 100644
--- a/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
@@ -332,6 +332,9 @@
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "global", "doorbell";
+ interconnects = <&system_noc MASTER_PCIE_0 &mc_virt SLAVE_EBI1>;
+ interconnect-names = "pcie-mem";
+
resets = <&gcc GCC_PCIE_BCR>;
reset-names = "core";
--
2.7.4
Powered by blists - more mailing lists