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Message-Id: <20230713124505.94866-8-ilpo.jarvinen@linux.intel.com>
Date: Thu, 13 Jul 2023 15:45:01 +0300
From: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
To: linux-pci@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Rob Herring <robh@...nel.org>,
Krzysztof Wilczyński <kw@...ux.com>,
Emmanuel Grumbach <emmanuel.grumbach@...el.com>,
"Rafael J . Wysocki" <rafael@...nel.org>,
Heiner Kallweit <hkallweit1@...il.com>,
Lukas Wunner <lukas@...ner.de>,
Saeed Mahameed <saeedm@...dia.com>,
Leon Romanovsky <leon@...nel.org>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Moshe Shemesh <moshe@...lanox.com>, netdev@...r.kernel.org,
linux-rdma@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Dean Luick <dean.luick@...nelisnetworks.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Jonas Dreßler <verdre@...d.nl>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Moshe Shemesh <moshe@...dia.com>,
Simon Horman <simon.horman@...igine.com>,
stable@...r.kernel.org
Subject: [PATCH v4 07/11] net/mlx5: Use RMW accessors for changing LNKCTL
Don't assume that only the driver would be accessing LNKCTL of the
upstream bridge. ASPM policy changes can trigger write to LNKCTL
outside of driver's control.
Use RMW capability accessors which do proper locking to avoid losing
concurrent updates to the register value.
Fixes: eabe8e5e88f5 ("net/mlx5: Handle sync reset now event")
Suggested-by: Lukas Wunner <lukas@...ner.de>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Reviewed-by: Moshe Shemesh <moshe@...dia.com>
Reviewed-by: Simon Horman <simon.horman@...igine.com>
Cc: stable@...r.kernel.org
---
drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c | 9 ++-------
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
index 4804990b7f22..99dcbd006357 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c
@@ -384,16 +384,11 @@ static int mlx5_pci_link_toggle(struct mlx5_core_dev *dev)
pci_cfg_access_lock(sdev);
}
/* PCI link toggle */
- err = pci_read_config_word(bridge, cap + PCI_EXP_LNKCTL, ®16);
- if (err)
- return err;
- reg16 |= PCI_EXP_LNKCTL_LD;
- err = pci_write_config_word(bridge, cap + PCI_EXP_LNKCTL, reg16);
+ err = pcie_capability_set_word(bridge, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_LD);
if (err)
return err;
msleep(500);
- reg16 &= ~PCI_EXP_LNKCTL_LD;
- err = pci_write_config_word(bridge, cap + PCI_EXP_LNKCTL, reg16);
+ err = pcie_capability_clear_word(bridge, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_LD);
if (err)
return err;
--
2.30.2
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