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Message-ID: <5dbc278117107bcc4047dc55f783dad397da1704.camel@linux.intel.com>
Date: Fri, 14 Jul 2023 15:16:18 -0700
From: Tim Chen <tim.c.chen@...ux.intel.com>
To: Shrikanth Hegde <sshegde@...ux.vnet.ibm.com>
Cc: Ricardo Neri <ricardo.neri-calderon@...ux.intel.com>,
Juri Lelli <juri.lelli@...hat.com>,
Vincent Guittot <vincent.guittot@...aro.org>,
Ricardo Neri <ricardo.neri@...el.com>,
"Ravi V . Shankar" <ravi.v.shankar@...el.com>,
Ben Segall <bsegall@...gle.com>,
Daniel Bristot de Oliveira <bristot@...hat.com>,
Dietmar Eggemann <dietmar.eggemann@....com>,
Len Brown <len.brown@...el.com>, Mel Gorman <mgorman@...e.de>,
"Rafael J . Wysocki" <rafael.j.wysocki@...el.com>,
Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>,
Steven Rostedt <rostedt@...dmis.org>,
Valentin Schneider <vschneid@...hat.com>,
Ionela Voinescu <ionela.voinescu@....com>, x86@...nel.org,
linux-kernel@...r.kernel.org,
Srikar Dronamraju <srikar@...ux.vnet.ibm.com>,
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Yicong Yang <yangyicong@...ilicon.com>,
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Chen Yu <yu.c.chen@...el.com>, Hillf Danton <hdanton@...a.com>,
Peter Zijlstra <peterz@...radead.org>
Subject: Re: [Patch v3 4/6] sched/fair: Consider the idle state of the whole
core for load balance
On Fri, 2023-07-14 at 18:32 +0530, Shrikanth Hegde wrote:
>
>
>
> Tried on a symmetric system with all cores having SMT=4 as well. There was reduction in migrations here as well.
> Didnt observe any major regressions when microbenchmarks run alone. Such as hackbench, stress-ng.
>
> So. Here is tested-by.
> Tested-by: Shrikanth Hegde <sshegde@...ux.vnet.ibm.com>
Thanks for testing.
>
>
> > +
> > /* Are we the first CPU of this group ? */
> > return group_balance_cpu(sg) == env->dst_cpu;
> > }
>
> One doubt though, Here a fully idle core would be chosen instead of first idle cpu in the
> group (if there is one). Since coming out of idle of SMT is faster compared to a fully idle core,
> would latency increase? Or that concerns mainly wakeup path?
Yeah, I think that concern is for the wakeup path and not for the balance path.
Tim
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