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Message-ID: <20230714113547.15384-1-pshete@nvidia.com>
Date: Fri, 14 Jul 2023 17:05:47 +0530
From: Prathamesh Shete <pshete@...dia.com>
To: <linus.walleij@...aro.org>, <thierry.reding@...il.com>,
<jonathanh@...dia.com>, <linux-gpio@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <pshete@...dia.com>
Subject: [PATCH v3] pinctrl: tegra: Add support to display pin function
The current function for a given pin is not displayed via the debugfs.
Add support to display the current function that is set for each pin.
Signed-off-by: Prathamesh Shete <pshete@...dia.com>
Acked-by: Thierry Reding <treding@...dia.com>
Reviewed-by: Jon Hunter <jonathanh@...dia.com>
---
drivers/pinctrl/tegra/pinctrl-tegra.c | 19 +++++++++++++++++--
drivers/pinctrl/tegra/pinctrl-tegra.h | 2 ++
2 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.c b/drivers/pinctrl/tegra/pinctrl-tegra.c
index 4547cf66d03b..cb1d67239cd0 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.c
@@ -96,6 +96,7 @@ static const struct cfg_param {
{"nvidia,slew-rate-falling", TEGRA_PINCONF_PARAM_SLEW_RATE_FALLING},
{"nvidia,slew-rate-rising", TEGRA_PINCONF_PARAM_SLEW_RATE_RISING},
{"nvidia,drive-type", TEGRA_PINCONF_PARAM_DRIVE_TYPE},
+ {"nvidia,function", TEGRA_PINCONF_PARAM_FUNCTION},
};
static int tegra_pinctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev,
@@ -470,6 +471,12 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx,
*bit = g->drvtype_bit;
*width = 2;
break;
+ case TEGRA_PINCONF_PARAM_FUNCTION:
+ *bank = g->mux_bank;
+ *reg = g->mux_reg;
+ *bit = g->mux_bit;
+ *width = 2;
+ break;
default:
dev_err(pmx->dev, "Invalid config param %04x\n", param);
return -ENOTSUPP;
@@ -633,8 +640,16 @@ static void tegra_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
val >>= bit;
val &= (1 << width) - 1;
- seq_printf(s, "\n\t%s=%u",
- strip_prefix(cfg_params[i].property), val);
+ if (cfg_params[i].param == TEGRA_PINCONF_PARAM_FUNCTION) {
+ u8 idx = pmx->soc->groups[group].funcs[val];
+
+ seq_printf(s, "\n\t%s=%s",
+ strip_prefix(cfg_params[i].property),
+ pmx->functions[idx].name);
+ } else {
+ seq_printf(s, "\n\t%s=%u",
+ strip_prefix(cfg_params[i].property), val);
+ }
}
}
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra.h b/drivers/pinctrl/tegra/pinctrl-tegra.h
index b3289bdf727d..e728efeaa4de 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra.h
+++ b/drivers/pinctrl/tegra/pinctrl-tegra.h
@@ -54,6 +54,8 @@ enum tegra_pinconf_param {
TEGRA_PINCONF_PARAM_SLEW_RATE_RISING,
/* argument: Integer, range is HW-dependant */
TEGRA_PINCONF_PARAM_DRIVE_TYPE,
+ /* argument: pinmux settings */
+ TEGRA_PINCONF_PARAM_FUNCTION,
};
enum tegra_pinconf_pull {
--
2.17.1
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