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Message-ID: <8d9726de-a9e4-009d-44cc-57d362473bed@tuxon.dev>
Date:   Sun, 16 Jul 2023 16:17:29 +0300
From:   claudiu beznea <claudiu.beznea@...on.dev>
To:     Guiting Shen <aarongt.shen@...il.com>, claudiu.beznea@...rochip.com
Cc:     linux-pwm@...r.kernel.org, alexandre.belloni@...tlin.com,
        linux-kernel@...r.kernel.org, thierry.reding@...il.com,
        u.kleine-koenig@...gutronix.de,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v6] pwm: atmel: Enable clk when pwm already enabled in
 bootloader

On 16.07.2023 05:06, Guiting Shen wrote:
> The driver would never call clk_enable() if the PWM channel was already
> enabled in bootloader which lead to dump the warning message "the PWM
> clock already disabled" when turning off the PWM channel.
> 
> Add atmel_pwm_enable_clk_if_on() in probe function to enable clock if
> the PWM channel was already enabled in bootloader.
> 
> Signed-off-by: Guiting Shen <aarongt.shen@...il.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@...on.dev>

> ---
>   drivers/pwm/pwm-atmel.c | 47 +++++++++++++++++++++++++++++++++++++++--
>   1 file changed, 45 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-atmel.c b/drivers/pwm/pwm-atmel.c
> index cdbc23649032..fc89282db645 100644
> --- a/drivers/pwm/pwm-atmel.c
> +++ b/drivers/pwm/pwm-atmel.c
> @@ -36,7 +36,7 @@
>   #define PWM_SR			0x0C
>   #define PWM_ISR			0x1C
>   /* Bit field in SR */
> -#define PWM_SR_ALL_CH_ON	0x0F
> +#define PWM_SR_ALL_CH_MASK	0x0F
>   
>   /* The following register is PWM channel related registers */
>   #define PWM_CH_REG_OFFSET	0x200
> @@ -464,6 +464,42 @@ static const struct of_device_id atmel_pwm_dt_ids[] = {
>   };
>   MODULE_DEVICE_TABLE(of, atmel_pwm_dt_ids);
>   
> +static int atmel_pwm_enable_clk_if_on(struct atmel_pwm_chip *atmel_pwm, bool on)
> +{
> +	unsigned int i, cnt = 0;
> +	int ret = 0;
> +	u32 sr;
> +
> +	sr = atmel_pwm_readl(atmel_pwm, PWM_SR) & PWM_SR_ALL_CH_MASK;
> +	if (!sr)
> +		return 0;
> +
> +	cnt = bitmap_weight((unsigned long *)&sr, atmel_pwm->chip.npwm);
> +
> +	if (!on)
> +		goto disable_clk;
> +
> +	for (i = 0; i < cnt; i++) {
> +		ret = clk_enable(atmel_pwm->clk);
> +		if (ret) {
> +			dev_err(atmel_pwm->chip.dev,
> +				"failed to enable clock for pwm %pe\n",
> +				ERR_PTR(ret));
> +
> +			cnt = i;
> +			goto disable_clk;
> +		}
> +	}
> +
> +	return 0;
> +
> +disable_clk:
> +	while (cnt--)
> +		clk_disable(atmel_pwm->clk);
> +
> +	return ret;
> +}
> +
>   static int atmel_pwm_probe(struct platform_device *pdev)
>   {
>   	struct atmel_pwm_chip *atmel_pwm;
> @@ -496,16 +532,23 @@ static int atmel_pwm_probe(struct platform_device *pdev)
>   	atmel_pwm->chip.ops = &atmel_pwm_ops;
>   	atmel_pwm->chip.npwm = 4;
>   
> +	ret = atmel_pwm_enable_clk_if_on(atmel_pwm, true);
> +	if (ret < 0)
> +		goto unprepare_clk;
> +
>   	ret = pwmchip_add(&atmel_pwm->chip);
>   	if (ret < 0) {
>   		dev_err(&pdev->dev, "failed to add PWM chip %d\n", ret);
> -		goto unprepare_clk;
> +		goto disable_clk;
>   	}
>   
>   	platform_set_drvdata(pdev, atmel_pwm);
>   
>   	return ret;
>   
> +disable_clk:
> +	atmel_pwm_enable_clk_if_on(atmel_pwm, false);
> +
>   unprepare_clk:
>   	clk_unprepare(atmel_pwm->clk);
>   	return ret;

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