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Message-ID: <34a4a052-b76f-b49d-6703-405d65ffd597@linaro.org>
Date:   Mon, 17 Jul 2023 21:28:15 +0100
From:   Caleb Connolly <caleb.connolly@...aro.org>
To:     Eric Chanudet <echanude@...hat.com>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Conor Dooley <conor+dt@...nel.org>
Cc:     linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: sa8540p-ride: enable rtc



On 17/07/2023 19:23, Eric Chanudet wrote:
> SA8540P-ride is one of the Qualcomm platforms that does not have access
> to UEFI runtime services and on which the RTC registers are read-only,
> as described in:
> https://lore.kernel.org/all/20230202155448.6715-1-johan+linaro@kernel.org/
> 
> Reserve four bytes in one of the PMIC registers to hold the RTC offset
> the same way as it was done for sc8280xp-crd which has similar
> limitations:
>     commit e67b45582c5e ("arm64: dts: qcom: sc8280xp-crd: enable rtc")
> 
> One small difference on SA8540P-ride, the PMIC register bank SDAM6 is
> not writable, so use SDAM7 instead.
> 
> Signed-off-by: Eric Chanudet <echanude@...hat.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 10 +++++++++-
>  arch/arm64/boot/dts/qcom/sa8540p-ride.dts   | 15 +++++++++++++++
>  2 files changed, 24 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
> index 1221be89b3de..9c5dcad35cce 100644
> --- a/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi
> @@ -14,7 +14,7 @@ pmm8540a: pmic@0 {
>  		#address-cells = <1>;
>  		#size-cells = <0>;
>  
> -		rtc@...0 {
> +		pmm8540a_rtc: rtc@...0 {
>  			compatible = "qcom,pm8941-rtc";
>  			reg = <0x6000>, <0x6100>;
>  			reg-names = "rtc", "alarm";
> @@ -22,6 +22,14 @@ rtc@...0 {
>  			wakeup-source;
>  		};
>  
> +		pmm8540a_sdam_7: nvram@...0 {
Johan disabled the SDAM node in their series for sc8280xp. Unless it's
used on all sa8540p platforms, you should probably also do that here.

			
> +			compatible = "qcom,spmi-sdam";
> +			reg = <0xb610>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +			ranges = <0 0xb610 0xb0>;
			status = "disabled";

With that fix,

Reviewed-by: Caleb Connolly <caleb.connolly@...aro.org>
> +		};
> +
>  		pmm8540a_gpios: gpio@...0 {
>  			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
>  			reg = <0xc000>;
> diff --git a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> index 5a26974dcf8f..608dd71a3f1c 100644
> --- a/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/sa8540p-ride.dts
> @@ -407,6 +407,21 @@ &pcie3a_phy {
>  	status = "okay";
>  };
>  
> +&pmm8540a_rtc {
> +	nvmem-cells = <&rtc_offset>;
> +	nvmem-cell-names = "offset";
> +
> +	status = "okay";
> +};
> +
> +&pmm8540a_sdam_7 {
> +	status = "okay";> +
> +	rtc_offset: rtc-offset@ac {
> +		reg = <0xac 0x4>;
> +	};
> +};
> +
>  &qup0 {
>  	status = "okay";
>  };

-- 
// Caleb (they/them)

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