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Message-ID: <19a7dae4-a9bd-187f-49f8-fe9c47f44eff@linaro.org>
Date: Mon, 17 Jul 2023 09:29:48 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Sarah Walker <sarah.walker@...tec.com>,
dri-devel@...ts.freedesktop.org
Cc: frank.binns@...tec.com, donald.robson@...tec.com,
boris.brezillon@...labora.com, faith.ekstrand@...labora.com,
airlied@...il.com, daniel@...ll.ch,
maarten.lankhorst@...ux.intel.com, mripard@...nel.org,
tzimmermann@...e.de, afd@...com, hns@...delico.com,
matthew.brost@...el.com, christian.koenig@....com,
luben.tuikov@....com, dakr@...hat.com,
linux-kernel@...r.kernel.org, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, conor+dt@...nel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH v4 02/17] dt-bindings: gpu: Add Imagination Technologies
PowerVR GPU
On 14/07/2023 16:25, Sarah Walker wrote:
> Add the device tree binding documentation for the Series AXE GPU used in
> TI AM62 SoCs.
>
...
> +
> + clocks:
> + minItems: 1
> + maxItems: 3
> +
> + clock-names:
> + items:
> + - const: core
> + - const: mem
> + - const: sys
> + minItems: 1
Why clocks for this device vary? That's really unusual to have a SoC IP
block which can have a clock physically disconnected, depending on the
board (not SoC!).
Best regards,
Krzysztof
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