lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Mon, 17 Jul 2023 11:37:32 +0200
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Fabrizio Castro <fabrizio.castro.jz@...esas.com>
Cc:     Mark Brown <broonie@...nel.org>,
        Andy Shevchenko <andy.shevchenko@...il.com>,
        linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org,
        Chris Paterson <Chris.Paterson2@...esas.com>,
        Biju Das <biju.das@...renesas.com>,
        Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>,
        linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH 07/10] spi: rzv2m-csi: Switch to using {read,write}s{b,w}

Hi Fabrizio,

On Sat, Jul 15, 2023 at 3:04 AM Fabrizio Castro
<fabrizio.castro.jz@...esas.com> wrote:
> The RX/TX FIFOs implemented by the CSI IP are accessed by
> repeatedly reading/writing the same memory address, and
> therefore they are the ideal candidate for {read,write}s{b,w}.
> The RZ/V2M CSI driver currently implements loops to fill up
> the TX FIFO and empty the RX FIFO, differentiating between
> 8-bit and 16-bit word size.
> Switch to using {read,write}s{b,w} to get rid of the bespoke
> loops.
>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>

Thanks for your patch!

> --- a/drivers/spi/spi-rzv2m-csi.c
> +++ b/drivers/spi/spi-rzv2m-csi.c

> @@ -157,22 +157,15 @@ static int rzv2m_csi_start_stop_operation(const struct rzv2m_csi_priv *csi,
>
>  static int rzv2m_csi_fill_txfifo(struct rzv2m_csi_priv *csi)
>  {
> -       int i;
> -
>         if (readl(csi->base + CSI_OFIFOL))
>                 return -EIO;
>
> -       if (csi->bytes_per_word == 2) {
> -               u16 *buf = (u16 *)csi->txbuf;
> -
> -               for (i = 0; i < csi->words_to_transfer; i++)
> -                       writel(buf[i], csi->base + CSI_OFIFO);
> -       } else {
> -               u8 *buf = (u8 *)csi->txbuf;
> -
> -               for (i = 0; i < csi->words_to_transfer; i++)
> -                       writel(buf[i], csi->base + CSI_OFIFO);
> -       }
> +       if (csi->bytes_per_word == 2)
> +               writesw(csi->base + CSI_OFIFO, csi->txbuf,
> +                       csi->words_to_transfer);
> +       else
> +               writesb(csi->base + CSI_OFIFO, csi->txbuf,
> +                       csi->words_to_transfer);

According to the hardware documentation[1], the access size for both the
CSI_OFIFO and CSI_IFIFO registers is 32 bits, so you must use writel()
resp. readl().  So please check with the hardware people first.

[1] RZ/V2M User's Manual Hardware, Rev. 1.30.

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ